TW200507086A - A method of producing substrates or components on substrates involving transfer of a useful layer, for microelectronics, optoelectronics, or optics - Google Patents

A method of producing substrates or components on substrates involving transfer of a useful layer, for microelectronics, optoelectronics, or optics

Info

Publication number
TW200507086A
TW200507086A TW093106789A TW93106789A TW200507086A TW 200507086 A TW200507086 A TW 200507086A TW 093106789 A TW093106789 A TW 093106789A TW 93106789 A TW93106789 A TW 93106789A TW 200507086 A TW200507086 A TW 200507086A
Authority
TW
Taiwan
Prior art keywords
substrates
useful layer
optoelectronics
microelectronics
optics
Prior art date
Application number
TW093106789A
Other languages
Chinese (zh)
Other versions
TWI295819B (en
Inventor
Fabrice Letertre
Olivier Rayssac
Original Assignee
Soitec Silicon On Insulator
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Soitec Silicon On Insulator filed Critical Soitec Silicon On Insulator
Publication of TW200507086A publication Critical patent/TW200507086A/en
Application granted granted Critical
Publication of TWI295819B publication Critical patent/TWI295819B/en

Links

Classifications

    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76259—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along a porous layer
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/31—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to form insulating layers thereon, e.g. for masking or by using photolithographic techniques; After treatment of these layers; Selection of materials for these layers
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/71—Manufacture of specific parts of devices defined in group H01L21/70
    • H01L21/76—Making of isolation regions between components
    • H01L21/762—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers
    • H01L21/7624—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology
    • H01L21/76251—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques
    • H01L21/76254—Dielectric regions, e.g. EPIC dielectric isolation, LOCOS; Trench refilling techniques, SOI technology, use of channel stoppers using semiconductor on insulator [SOI] technology using bonding techniques with separation/delamination along an ion implanted layer, e.g. Smart-cut, Unibond
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/02—Manufacture or treatment of semiconductor devices or of parts thereof
    • H01L21/04—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer
    • H01L21/18—Manufacture or treatment of semiconductor devices or of parts thereof the devices having potential barriers, e.g. a PN junction, depletion layer or carrier concentration layer the devices having semiconductor bodies comprising elements of Group IV of the Periodic Table or AIIIBV compounds with or without impurities, e.g. doping materials
    • H01L21/30—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26
    • H01L21/302—Treatment of semiconductor bodies using processes or apparatus not provided for in groups H01L21/20 - H01L21/26 to change their surface-physical characteristics or shape, e.g. etching, polishing, cutting
    • H01L21/306—Chemical or electrical treatment, e.g. electrolytic etching
    • H01L21/30604—Chemical etching
    • H01L21/30612—Etching of AIIIBV compounds
    • H01L21/30621—Vapour phase etching
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L21/00—Processes or apparatus adapted for the manufacture or treatment of semiconductor or solid state devices or of parts thereof
    • H01L21/70—Manufacture or treatment of devices consisting of a plurality of solid state components formed in or on a common substrate or of parts thereof; Manufacture of integrated circuit devices or of parts thereof
    • H01L21/77—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate
    • H01L21/78—Manufacture or treatment of devices consisting of a plurality of solid state components or integrated circuits formed in, or on, a common substrate with subsequent division of the substrate into plural individual devices

Landscapes

  • Engineering & Computer Science (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Manufacturing & Machinery (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Recrystallisation Techniques (AREA)
  • Crystals, And After-Treatments Of Crystals (AREA)
  • Led Devices (AREA)
  • Element Separation (AREA)

Abstract

The invention provides a method of transferring a useful layer of a monocrystalline material from a first support to a second support, comprising the following steps: .forming a first substrate comprising the first support(10) and the useful layer(14,16) with a detachable interfaced (12) between them, in which a treatment involving the useful layer includes the formation of a peripheral zone of material(161) that may laterally cover said interface; removing material, allowing detachment to reach said interfaced (12) in order to detach it at said interface; affixing a free face of the useful layer(14,16) to a second support(20); and detaching at said interface(12). The detachment means can be employed in the absence of a peripheral zone of material. Application to fabricating substrates or components on substrates for microelectronics, optoelectronics, or optics.
TW093106789A 2003-03-14 2004-03-12 A method of producing substrates or components on substrates involving transfer of a useful layer, for microelectronics, optoelectronics, or optics TWI295819B (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
FR0303163A FR2852445B1 (en) 2003-03-14 2003-03-14 PROCESS FOR PRODUCING SUBSTRATES OR COMPONENTS ON SUBSTRATES WITH USEFUL LAYER TRANSFER FOR MICROELECTRONICS, OPTOELECTRONICS OR OPTICS

Publications (2)

Publication Number Publication Date
TW200507086A true TW200507086A (en) 2005-02-16
TWI295819B TWI295819B (en) 2008-04-11

Family

ID=32893302

Family Applications (1)

Application Number Title Priority Date Filing Date
TW093106789A TWI295819B (en) 2003-03-14 2004-03-12 A method of producing substrates or components on substrates involving transfer of a useful layer, for microelectronics, optoelectronics, or optics

Country Status (6)

Country Link
EP (1) EP1606839A2 (en)
JP (1) JP4672648B2 (en)
KR (1) KR100801780B1 (en)
FR (1) FR2852445B1 (en)
TW (1) TWI295819B (en)
WO (1) WO2004081974A2 (en)

Cited By (1)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102231408A (en) * 2011-07-04 2011-11-02 无锡成敏光伏技术咨询有限公司 Method for manufacturing solar cell by layer transfer

Families Citing this family (12)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2860842B1 (en) * 2003-10-14 2007-11-02 Tracit Technologies PROCESS FOR PREPARING AND ASSEMBLING SUBSTRATES
WO2007017763A2 (en) * 2005-07-08 2007-02-15 S.O.I. Tec Silicon On Insulator Technologies Method of production of a film
FR2888400B1 (en) * 2005-07-08 2007-10-19 Soitec Silicon On Insulator LAYER TAKING METHOD
FR2899594A1 (en) 2006-04-10 2007-10-12 Commissariat Energie Atomique METHOD FOR ASSEMBLING SUBSTRATES WITH THERMAL TREATMENTS AT LOW TEMPERATURES
WO2009007003A1 (en) * 2007-07-11 2009-01-15 S.O.I. Tec Silicon On Insulator Technologies Method for recycling a substrate, laminated water fabricating method and suitable recycled donor substrate
EP2015354A1 (en) * 2007-07-11 2009-01-14 S.O.I.Tec Silicon on Insulator Technologies Method for recycling a substrate, laminated wafer fabricating method and suitable recycled donor substrate
DE102007025649B4 (en) * 2007-07-21 2011-03-03 X-Fab Semiconductor Foundries Ag A method of transferring an epitaxial layer from a donor to a system disk of microsystem technology
EP2246882B1 (en) * 2009-04-29 2015-03-04 Soitec Method for transferring a layer from a donor substrate onto a handle substrate
JP5859742B2 (en) * 2011-04-28 2016-02-16 京セラ株式会社 Composite board
JP5976999B2 (en) * 2011-05-30 2016-08-24 京セラ株式会社 Composite board
CN103299396B (en) * 2011-06-23 2015-11-25 旭化成电子材料株式会社 The manufacture method of fine pattern formation laminate and fine pattern formation laminate
FR2995446A1 (en) * 2012-09-07 2014-03-14 Soitec Silicon On Insulator Method for manufacturing structure, involves treating outlying area of localized interfaces, selecting localized sealing of interface, and detecting localized defect formation in layer between interfaces

Family Cites Families (9)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
FR2771852B1 (en) * 1997-12-02 1999-12-31 Commissariat Energie Atomique METHOD FOR THE SELECTIVE TRANSFER OF A MICROSTRUCTURE, FORMED ON AN INITIAL SUBSTRATE, TO A FINAL SUBSTRATE
DE69917819T2 (en) * 1998-02-04 2005-06-23 Canon K.K. SOI substrate
US6177359B1 (en) * 1999-06-07 2001-01-23 Agilent Technologies, Inc. Method for detaching an epitaxial layer from one substrate and transferring it to another substrate
JP3472197B2 (en) * 1999-06-08 2003-12-02 キヤノン株式会社 Semiconductor substrate and method for manufacturing solar cell
US6664169B1 (en) * 1999-06-08 2003-12-16 Canon Kabushiki Kaisha Process for producing semiconductor member, process for producing solar cell, and anodizing apparatus
FR2796491B1 (en) * 1999-07-12 2001-08-31 Commissariat Energie Atomique METHOD FOR TAKING OFF TWO ELEMENTS AND DEVICE FOR IMPLEMENTING SAME
JP2001284622A (en) * 2000-03-31 2001-10-12 Canon Inc Method for manufacturing semiconductor member and method for manufacturing solar cell
JP4109823B2 (en) * 2000-10-10 2008-07-02 株式会社東芝 Manufacturing method of semiconductor device
FR2823596B1 (en) * 2001-04-13 2004-08-20 Commissariat Energie Atomique SUBSTRATE OR DISMOUNTABLE STRUCTURE AND METHOD OF MAKING SAME

Cited By (2)

* Cited by examiner, † Cited by third party
Publication number Priority date Publication date Assignee Title
CN102231408A (en) * 2011-07-04 2011-11-02 无锡成敏光伏技术咨询有限公司 Method for manufacturing solar cell by layer transfer
CN102231408B (en) * 2011-07-04 2015-04-08 无锡成敏光伏技术咨询有限公司 Method for manufacturing solar cell by layer transfer

Also Published As

Publication number Publication date
KR20050111358A (en) 2005-11-24
FR2852445B1 (en) 2005-05-20
TWI295819B (en) 2008-04-11
WO2004081974A3 (en) 2004-11-25
FR2852445A1 (en) 2004-09-17
JP4672648B2 (en) 2011-04-20
EP1606839A2 (en) 2005-12-21
WO2004081974A2 (en) 2004-09-23
JP2006520539A (en) 2006-09-07
KR100801780B1 (en) 2008-02-11

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