TW200504900A - A semiconductor device and the manufacturing method thereof - Google Patents

A semiconductor device and the manufacturing method thereof

Info

Publication number
TW200504900A
TW200504900A TW093112814A TW93112814A TW200504900A TW 200504900 A TW200504900 A TW 200504900A TW 093112814 A TW093112814 A TW 093112814A TW 93112814 A TW93112814 A TW 93112814A TW 200504900 A TW200504900 A TW 200504900A
Authority
TW
Taiwan
Prior art keywords
leads
semiconductor device
resin encapsulation
edge
bonding wires
Prior art date
Application number
TW093112814A
Other languages
English (en)
Inventor
Fujio Ito
Takafumi Konno
Tsugio Umehara
Hiromichi Suzuki
Original Assignee
Renesas Tech Corp
Renesas Nthn Jp Semiconductor
Priority date (The priority date is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the date listed.)
Filing date
Publication date
Application filed by Renesas Tech Corp, Renesas Nthn Jp Semiconductor filed Critical Renesas Tech Corp
Publication of TW200504900A publication Critical patent/TW200504900A/zh

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Classifications

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    • H01L24/47—Structure, shape, material or disposition of the wire connectors after the connecting process
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    • H01L23/3107—Encapsulations, e.g. encapsulating layers, coatings, e.g. for protection characterised by the arrangement or shape the device being completely enclosed
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    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01028—Nickel [Ni]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01029—Copper [Cu]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01047—Silver [Ag]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/0105—Tin [Sn]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01078—Platinum [Pt]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/01—Chemical elements
    • H01L2924/01079—Gold [Au]
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/0132—Binary Alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/013—Alloys
    • H01L2924/014—Solder alloys
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/10—Details of semiconductor or other solid state devices to be connected
    • H01L2924/11—Device type
    • H01L2924/14—Integrated circuits
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/151—Die mounting substrate
    • H01L2924/153—Connection portion
    • H01L2924/1531—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface
    • H01L2924/15311—Connection portion the connection portion being formed only on the surface of the substrate opposite to the die mounting surface being a ball array, e.g. BGA
    • H—ELECTRICITY
    • H01—ELECTRIC ELEMENTS
    • H01L—SEMICONDUCTOR DEVICES NOT COVERED BY CLASS H10
    • H01L2924/00—Indexing scheme for arrangements or methods for connecting or disconnecting semiconductor or solid-state bodies as covered by H01L24/00
    • H01L2924/15—Details of package parts other than the semiconductor or other solid state devices to be connected
    • H01L2924/181—Encapsulation

Landscapes

  • Engineering & Computer Science (AREA)
  • Computer Hardware Design (AREA)
  • Microelectronics & Electronic Packaging (AREA)
  • Power Engineering (AREA)
  • Physics & Mathematics (AREA)
  • Condensed Matter Physics & Semiconductors (AREA)
  • General Physics & Mathematics (AREA)
  • Geometry (AREA)
  • Wire Bonding (AREA)
  • Encapsulation Of And Coatings For Semiconductor Or Solid State Devices (AREA)
  • Lead Frames For Integrated Circuits (AREA)
TW093112814A 2003-06-05 2004-05-06 A semiconductor device and the manufacturing method thereof TW200504900A (en)

Applications Claiming Priority (1)

Application Number Priority Date Filing Date Title
JP2003160647A JP2004363365A (ja) 2003-06-05 2003-06-05 半導体装置及びその製造方法

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Publication number Priority date Publication date Assignee Title
JP2006351907A (ja) * 2005-06-17 2006-12-28 Renesas Technology Corp 半導体装置及びその製造方法
JP4770514B2 (ja) * 2006-02-27 2011-09-14 株式会社デンソー 電子装置
US8164168B2 (en) * 2006-06-30 2012-04-24 Oki Semiconductor Co., Ltd. Semiconductor package
JP2009141080A (ja) * 2007-12-05 2009-06-25 Toshiba Corp リードフレームおよび半導体装置
DE102008054735A1 (de) * 2008-12-16 2010-06-17 Robert Bosch Gmbh Leadless-Gehäusepackung
US9196504B2 (en) * 2012-07-03 2015-11-24 Utac Dongguan Ltd. Thermal leadless array package with die attach pad locking feature
JP6210818B2 (ja) * 2013-09-30 2017-10-11 三菱電機株式会社 半導体装置およびその製造方法
CN105097749B (zh) * 2014-04-15 2019-01-08 恩智浦美国有限公司 组合的qfn和qfp半导体封装
CN107422551A (zh) * 2017-07-25 2017-12-01 武汉天马微电子有限公司 一种显示装置
DE102017215027A1 (de) 2017-08-28 2019-02-28 Robert Bosch Gmbh Halbleiterbauelement und Kontaktieranordnung mit einem Halbleiterbauelement und einer Leiterplatte
CN109905975B (zh) * 2019-03-21 2020-05-19 清能德创电气技术（北京）有限公司 一种电子元器件兼容封装方法及系统
JP7265502B2 (ja) * 2020-03-19 2023-04-26 株式会社東芝 半導体装置

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JP3062192B1 (ja) * 1999-09-01 2000-07-10 松下電子工業株式会社 リ―ドフレ―ムとそれを用いた樹脂封止型半導体装置の製造方法
JP3436253B2 (ja) * 2001-03-01 2003-08-11 松下電器産業株式会社 樹脂封止型半導体装置およびその製造方法
US6828661B2 (en) * 2001-06-27 2004-12-07 Matsushita Electric Industrial Co., Ltd. Lead frame and a resin-sealed semiconductor device exhibiting improved resin balance, and a method for manufacturing the same
US6882035B2 (en) * 2003-07-09 2005-04-19 Agilent Technologies, Inc. Die package

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CN1574331A (zh) 2005-02-02
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JP2004363365A (ja) 2004-12-24

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