TW200412708A - Start-up overshoot inhibition for power converter - Google Patents

Start-up overshoot inhibition for power converter Download PDF

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TW200412708A
TW200412708A TW92100583A TW92100583A TW200412708A TW 200412708 A TW200412708 A TW 200412708A TW 92100583 A TW92100583 A TW 92100583A TW 92100583 A TW92100583 A TW 92100583A TW 200412708 A TW200412708 A TW 200412708A
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voltage
rising
circuit
reference voltage
linear
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TW92100583A
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TW591871B (en
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Sae-Ueng Sakda
Ming-Chun Xu
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Delta Electronics Inc
Delta Electronics Thailand Public Ltd
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Publication of TW200412708A publication Critical patent/TW200412708A/en

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Abstract

A start-up overshoot inhibition technique for a power converter is addressed. The start-up overshoot inhibition technique according to the present invention basically uses a reference voltage generator to precipitate the rising slopes of multiple output voltages of a power converter to become mutually unanimous during start-up period, and thereby avoid the occurrence of system faults in the power converter due to the instantaneously rapid increase of output voltage thereof during start-up period.

Description

200412708 五、發明說明(1) 發明所屬之技術領域 本發明係關於一種電源轉換器,更特別的是本發明係 關於一種電源轉換器之啟動過沖禁止技術(start—up overshoot inhibition)。 先前技術 請參見第一圖’其係為習用之同步整流電源轉換器之 一電路示意圖。如第一圖所示,一習用之同步整流電源轉 換器通常包含一開關控制電路1 0 1,一磁飽和放大器丨〇 2, 開關電路1 0 3 ’ 一輸出濾、波器1 〇 4,一電阻式電壓分壓器 105以及一參考電壓產生器1〇6。磁飽和放大器(magnetic amp 1 1 f 1 er) 1 02係將一變壓器τ 1之二次侧繞阻端所感應出 的父流電壓VAC以磁性麵合(magnetic coupling)的方式放 大,並且所放大之交流電壓係藉由開關電路1〇3的開/關操 作而轉換成一直流電壓。所產生的直流電壓經由一電感la 以及電容CA所組成之輸出據波器(0UtpUt filter) 104整 流並平順化(smooth)後,產生一輸出電壓v〇提供至一負載 (未顯示)。此外,輸出電壓V0更經由電阻rA與RB所組成之 一電阻式電壓分壓器(resistive voltage divider)105 而 回授一個部分的輸出電壓(fractional 〇utput v〇ltage) Vs至一開關控制電路101。開關控制電路(switch c⑽tr(3l circuit) 101利用一内部的比較器(為簡化說明而未顯示 於圖中)來將部分輸出電壓VS與一參考電壓比較器 (reference voltage generator)106 所提供之一參考電壓200412708 V. Description of the invention (1) Technical field to which the invention belongs The present invention relates to a power converter, and more particularly, the present invention relates to a start-up overshoot inhibition technology for a power converter. The prior art is shown in the first figure, which is a circuit diagram of a conventional synchronous rectifier power converter. As shown in the first figure, a conventional synchronous rectifier power converter usually includes a switching control circuit 101, a magnetic saturation amplifier 丨 〇2, a switching circuit 103 ′-an output filter, a wave filter 104, a The resistive voltage divider 105 and a reference voltage generator 106. The magnetic saturation amplifier (magnetic amp 1 1 f 1 er) 1 02 is to amplify the parent current voltage VAC induced by the secondary winding end of a transformer τ 1 in a magnetic coupling manner, and the amplified The AC voltage is converted into a DC voltage by the on / off operation of the switching circuit 103. The generated DC voltage is rectified and smoothed by an output filter (0UtpUt filter) 104 composed of an inductor la and a capacitor CA, and an output voltage v0 is generated and provided to a load (not shown). In addition, the output voltage V0 returns a partial output voltage (fractional 〇utput v〇ltage) Vs to a switch control circuit 101 through a resistive voltage divider 105 composed of resistors rA and RB. . The switch control circuit (switch c⑽tr (3l circuit) 101 utilizes an internal comparator (not shown in the figure for simplicity) to compare part of the output voltage VS with a reference voltage generator 106. Reference voltage

第6頁 200412708 五、發明說明(2)Page 6 200412708 V. Description of the invention (2)

Vref做比較,並依此產生脈衝寬度調變訊號(叫 modulation signal,PWM Signal)。開關控制電路 1〇1 内 =之-驅動電路(其通常為_電晶體所完成),係根據脈衝 寬度調變訊號之-寬度驅動開關電路1()3導通/截止,藉以 控制開關電路103的開關任務週duty cycle),進而同時穩定輸出電壓仰的大小,俾以完成同步 整流。.另一方面,一内部管理電路(h〇usekeeping circuit,其並未顯示於圖中)會發出遠端開/關訊號 (remote 0N/0FF signal)以將輸出電壓“提供至遠端的受 電裝置,如主機板或硬碟等等。 一般使用於電源供應系統之電源轉換器,通常會提供 多個具有預定電壓準位,例如5V或3· 3V的輸出電壓,每個 輸出電壓係提供予一個或多個在此電壓下能夠適當操作的 電子δ又備。如第二圖(a)所示,一第一輸出電壓^以以在其 啟動期間(Ο-tl)内係以一固定的上升斜率爬升至一穩定^ ^準位(如5V),此時電源轉換器乃是進入啟動模式作。 這裡所謂的啟動期間(start —up time or set — up Ume)乃 是指電源供應器從輸入端接上電源起到其輸出電壓上升到 穩壓範圍内為止的時間。相似的,一第二輸出電壓ν〇^2 在其啟動時間(〇 — t2)内係以一固定的上升斜率版升至一 疋電壓準位(如3.3V) ’並且該第一輸出電壓v〇uti在上升 部分的斜率與該第二輸出電壓Vout2在上升部分的斜率$ 當接近,當兩輸出電壓分別達成穩定下來後,電源轉換3哭 便可分別輸出兩種不同準位的穩定直流電壓盆— 、 ,、匕的a 200412708 五、發明說明(3) 載,而進入正常模式操作。 :而’電源轉換器之㈣,一般乃是屬 載凡件(dynamic load η · 徑切 L 員 操作時,負載之負載二e:::於器實際 因此於啟動時間㉔,有“會因為 輸出超過設定值的輸出電壓, -圖ΓΜ张-—牡/ 4刀的斜率出現過大的現象。如第 一 0(b)所不,弟一輸出電壓v〇utl由於受到其相 m響’而瞬間輸出一過大的電壓,使得電:的上 卜H i幅度增加。然而同一時間第二輸出電壓V〇ut2的 j =斜率保持不變,使得在電源轉換器之啟動期間内的某 一枯間點t3上,第一輸出電壓¥〇111:1的瞬間電壓值與第二 輸出電壓V0ut2的瞬間電壓值間的差距超過其穩定電壓值 =,差距,例如,5ν — 3· 3ν=1· 7V,導致電源轉換器的輸出 “、堅超過負載元件所能承受的電壓而誤動作,進而造成當 機此種因為輸出電壓在啟動期間内瞬間急速上升而造成 系統發生錯誤操作的現象,便稱之為啟動過沖(start —up overshoot 〇r set-up overshoot) 〇 因此所需要的是提出一種電源轉換器的啟動過沖禁止 技術’以避免電源轉換器在啟動期間發生啟動過沖的問 題’來確保系統的正常操作。 發明内容 本發明之一較為廣義的態樣係由一電源轉換器所完Vref is compared, and a pulse width modulation signal (called a modulation signal, PWM Signal) is generated accordingly. Within the switch control circuit 1001 =-drive circuit (which is usually completed by _transistor), which is based on the pulse width modulation signal of the -width drive switch circuit 1 () 3 to turn on / off to control the switching circuit 103 Switching duty cycle), and then stabilize the output voltage at the same time to complete the synchronous rectification. On the other hand, an internal management circuit (which is not shown in the figure) sends a remote on / off signal (remote 0N / 0FF signal) to provide the output voltage to the remote power receiving device. , Such as motherboards or hard disks, etc. Power converters generally used in power supply systems usually provide multiple output voltages with a predetermined voltage level, such as 5V or 3 · 3V, each output voltage is provided to a Or multiple electrons δ that can be properly operated at this voltage are available. As shown in the second graph (a), a first output voltage ^ is set to a fixed rise during its start-up period (0-tl). The slope climbs to a stable level (such as 5V). At this time, the power converter enters the startup mode. The so-called start-up time or set-up Ume refers to the power supply from the input The time from the termination of the power supply until its output voltage rises within the regulation range. Similarly, a second output voltage ν〇 ^ 2 rises with a fixed rising slope within its startup time (〇- t2). To a voltage level (eg 3.3V) '' And the slope of the rising portion of the first output voltage v0uti and the slope of the rising portion of the second output voltage Vout2 are close to each other. When the two output voltages have respectively stabilized, the power conversion 3 can output two different types. Stable DC voltage basins of different levels — ,,,, and 20042004708 V. Description of the invention (3) load, and enter normal mode operation .: And the 'power converter' is generally a dynamic load (dynamic load) η · During the operation of the radial cutting L, the load of the load is e ::: The actual device is at the start time. Therefore, there will be "the output voltage will exceed the set value because of the output. An excessively large phenomenon has occurred. As is not the case in the first 0 (b), the output voltage v0utl of the younger brother is instantaneously outputting an excessively large voltage due to its phase m ', which makes the amplitude of the electric power increase. However, the same The j = slope of the second output voltage V〇ut2 remains constant, so that at a certain dead point t3 during the startup period of the power converter, the instantaneous voltage value of the first output voltage ¥ 〇111: 1 and the second Instantaneous power of output voltage V0ut2 The difference between the voltage values exceeds its stable voltage value =, the difference, for example, 5ν — 3 · 3ν = 1 · 7V, causes the output of the power converter to exceed the voltage that the load component can withstand and cause malfunction, which causes a crash. This phenomenon that the system malfunctions due to the instantaneous rapid rise in output voltage during the startup period is called start-up overshoot (set-up overshoot). Therefore, what is needed is to propose a power conversion The device's startup overshoot prohibition technology 'to avoid the problem of startup overshoot during power converter startup' to ensure the normal operation of the system. SUMMARY OF THE INVENTION A more general aspect of the present invention is accomplished by a power converter.

第8頁 200412708 五、發明說明(4) =抑其包括至少一個磁飽和放大器,每個係磁性耦合一變 ^ =之一繞阻上之一交流電壓,並且放大該交流電壓,至 =一個開關電路,耗接於該磁飽和放大器,每個係因應其 關柄作而將放大之交流電壓轉換成一直流電壓,至少 一,輪出濾波器,耦接於該開關電路,每個係用以提供一 預^的輪出電壓至一負載,至少一開關控制電路,每個係 =二輸出電壓與一參考電壓做比較,以產生一脈衝寬度調 變=號來控制開關電路之開/關操作,以及一參考電壓產 生,,耦接至該開關控制電路,其係分別提供一參考電壓 至每一個開關控制電路,並且參考電壓係使每個預定的輸 出電壓在一啟動期間内之一上升斜率趨近一致。 狹義而言,上述之參考電壓產生器包括一線性電壓產 生電路’用以產生具有一上升斜率特性之電壓,一第一參 考電壓產生電路,用以依據一預定電壓來限制具有上升斜 率特性之該電壓,而產生一第一參考電壓,以及一第二參 考電壓產生電路,用以使具有一上升斜率特性之該電壓於 一段短時間後啟動並且增加該電壓之斜率,而產生一第二 參考電壓。 一 本發明之前的敘述與本發明之優點與特徵,得藉由下 面實施例配合下列圖示詳細說明,俾得一更深入之瞭解。 簡單圖示說明 第一圖係圖例顯示根據一習用之電源轉換器之一電路 示意圖;Page 8 200412708 V. Description of the invention (4) = It includes at least one magnetic saturation amplifier, each of which is magnetically coupled ^ = one of the windings and one of the AC voltages, and amplifies the AC voltage to = a switch Each circuit is connected to the magnetic saturation amplifier. Each system converts the amplified AC voltage into a DC voltage due to its closing operation. At least one wheel-out filter is coupled to the switching circuit. Each system is used to provide A pre-rounded output voltage to a load, at least one switch control circuit, each system = two output voltages are compared with a reference voltage to generate a pulse width modulation = sign to control the on / off operation of the switch circuit, And a reference voltage is generated and coupled to the switch control circuit, which provides a reference voltage to each switch control circuit respectively, and the reference voltage causes each predetermined output voltage to have a rising slope during a startup period. Nearly consistent. In a narrow sense, the above-mentioned reference voltage generator includes a linear voltage generating circuit 'for generating a voltage having a rising slope characteristic, and a first reference voltage generating circuit for limiting the voltage having a rising slope characteristic according to a predetermined voltage. Voltage to generate a first reference voltage and a second reference voltage generating circuit for enabling the voltage with a rising slope characteristic to start after a short period of time and increasing the slope of the voltage to generate a second reference voltage . The previous description of the present invention and the advantages and features of the present invention can be obtained through a detailed description of the following embodiments in conjunction with the following figures, to gain a deeper understanding. Simple diagram description The first diagram is a schematic diagram showing a circuit diagram of a conventional power converter;

第9頁 200412708 五、發明說明(5) 第二圖(a )係顯示習用之具有複數個預定直流電壓輸 出之電源轉換器之輸出電壓波形圖; 第二圖(b)係顯示具有複數個預定直流電壓輸出之電 源轉換器之輸出電壓發生啟動過沖現象的波形圖; 第三圖係為本發明之電源轉換器之一電路示音、圖· 第四圖係顯示本發明之電源轉換器之開關 二°, 一電路示意圖; 工彳電路之 第五圖顯示本發明之電源轉換器之參考訊 一電路示意圖; ^產生器之 第六圖顯示本發明之電源轉換器之參考訊雜 各別内部電路電路節點上之電壓波形圖;以及〜產生器之 第七圖顯示突入電流限制感應電壓,遠端 號,第一參考電壓以及第二參考電壓之電壓 f/關訊 /久%圖。 元件符號說明: 1 0 1開關控制電路 102磁飽和放大器 1 0 3開關電路 1 0 4輸出濾波器 105電阻式電壓分壓器 106參考電壓產生器 200, 201電路部件 2 0 2,2 0 3開關控制電路 2 0 4, 2 0 5磁餘和放大写 200412708 五、發明說明(6) 2 0 6,2 0 7開關電路 2 0 8,2 0 9輸出濾波器 210, 211電阻式電壓分壓器 212參考電壓產生器 2 1 3誤差放大器 2 1 4驅動電路 3 0 1比較器 3 0 2電流源 3 0 3,3 0 4 開關 3 0 5電壓隨耦器 3 0 6限壓器 307固定電壓 308固定電壓 3 0 9電壓減法器 31 0第一象限截波器 311放大器 3 1 2限壓器 315具上升斜率之線性電壓產生電路 316第一參考電壓產生方塊 317第二參考電壓產生方塊 實施方式 本發明之電源轉換器之一電路示意圖係顯示於第三 圖。本發明之電源轉·換器乃是組態設定以提供多數個預定Page 9 200412708 V. Description of the invention (5) The second diagram (a) shows the output voltage waveform diagram of a conventional power converter with a plurality of predetermined DC voltage outputs; the second diagram (b) shows a plurality of predetermined The waveform diagram of the start-up overshoot phenomenon of the output voltage of the power converter with a DC voltage output; the third diagram is a circuit tone of one of the power converters of the present invention, and the diagram · the fourth diagram shows the power converter of the present invention. Switch 2 °, a circuit diagram; the fifth diagram of the industrial circuit shows a reference circuit diagram of the power converter of the present invention; the sixth diagram of the generator shows the reference circuit of the power converter of the present invention. The voltage waveform diagram of the circuit circuit node; and the seventh diagram of the ~ generator shows the inrush current limit induced voltage, the far-end number, the first reference voltage, and the voltage f / offset / time percent of the second reference voltage. Component symbol description: 1 0 1 switch control circuit 102 magnetic saturation amplifier 1 0 3 switch circuit 1 0 4 output filter 105 resistive voltage divider 106 reference voltage generator 200, 201 circuit component 2 0 2, 2 0 3 switch Control circuit 2 0 4, 2 0 5 Magnetism and amplification write 200412708 V. Description of the invention (6) 2 0 6, 2 0 7 Switch circuit 2 0 8, 2 0 9 Output filter 210, 211 Resistive voltage divider 212 Reference voltage generator 2 1 3 Error amplifier 2 1 4 Drive circuit 3 0 1 Comparator 3 0 2 Current source 3 0 3, 3 0 4 Switch 3 0 5 Voltage follower 3 0 6 Voltage limiter 307 Fixed voltage 308 Fixed voltage 3 0 9 voltage subtractor 31 0 first quadrant chopper 311 amplifier 3 1 2 voltage limiter 315 linear voltage generating circuit with rising slope 316 first reference voltage generating block 317 second reference voltage generating block A circuit diagram of one of the invention's power converters is shown in the third figure. The power converter of the present invention is configured to provide a large number of reservations.

200412708 五、發明說明(7) 的輸出電壓,而在本較佳實施例中、 壓來舉例說明,但是相同的原理及廉兩個預定輸出電 提供超過兩個預定輸出電壓。笛可進一步擴張至可 個電路部件(sect ion) 20 0,2〇1,每個_ 轉換器包括兩 定以產生一預定輸出電壓。電路 =路部件係組態設 大器204,其係以磁性耦合的方土括一磁飽和放 繞阻端上所感應之交流電壓予以 、,欠壓态τ 1之二次 206的開/關操作而轉成—直流所產^經㈣關電路 由一電感U以及一電容C1m組^ = ^ = 的直流電壓經 平順化(—)後,產生一第ΐ:=皮器2”整流與 負載(未顯示)。同樣的,電路部件2 i outl提供至- 器m,其係以磁㈣合的方式=〇1 = 一磁飽和放大 w P β A > _ # r乃式不將一變壓器丁1之輔助繞 直流電壓。所產生的直流電壓經 ^ -電感L2以及-電容C2所組成之輸出據波器2〇9整流與 平順化(smooth)後,產生一第二輸出電壓v〇ut2提供至一 負載(未顯示)。此外,第一輸出電壓v〇utl更經由電阻Rl 與R2所組成之一電阻式電壓分壓器21〇而回授一個部分的 輸出電壓vsi至一開關控制電路202。開關控制電路2〇2利 用一内部的比較器(為簡化說明而未顯示於圖中)來將部分 輸出電壓vsi與一參考電壓產生器(reference v〇ltage generator)212所提供之一第一參考電壓Vrefl做比較,並 依此產生脈衝寬度调變訊號(pUlse—width modulation signal, PWM signal)。開關控制電路202内部之一驅動電200412708 Fifth, the output voltage of invention description (7), and in this preferred embodiment, the voltage is exemplified, but the same principle and the two predetermined output voltages provide more than two predetermined output voltages. The flute can be further expanded to a number of circuit components (20, 20), each converter including two sets to generate a predetermined output voltage. The circuit = circuit component is configured with a large device 204, which is an on / off of the secondary 206 of magnetically coupled square earth including a magnetically saturated winding winding resistance terminal, undervoltage τ 1 secondary 206 The operation is converted into DC. The ^ pass circuit is composed of an inductor U and a capacitor C1m. The DC voltage of ^ = ^ = is smoothed (—), and a ΐ: = 皮 器 2 ”rectifier and load are generated. (Not shown). Similarly, the circuit component 2 i outl is provided to the device m, which is magnetically coupled = 〇1 = a magnetic saturation amplifier w P β A > _ # r is not a transformer The auxiliary winding DC voltage of Ding 1. The generated DC voltage is rectified and smoothed by the output wave filter 209 composed of ^ -inductor L2 and -capacitor C2 to generate a second output voltage v〇ut2 Provided to a load (not shown). In addition, the first output voltage v0utl returns a portion of the output voltage vsi to a switch control circuit via a resistive voltage divider 21 composed of resistors R1 and R2. 202. The switch control circuit 202 uses an internal comparator (not shown in the figure for the sake of simplicity). Compare part of the output voltage vsi with a first reference voltage Vrefl provided by a reference voltage generator 212, and generate a pulse width modulation signal (pUlse-width modulation signal, PWM signal) accordingly. . Switch control circuit 202

第12頁 200412708 五、發明說明(8) --- 路(_其通常為一電晶體所完成),係根據脈衝寬度調變訊號 =一丸度驅動開關電路2〇6導通/截止,藉以控制開關電路 空—的開關任務週期㈠^忧^叫札^町^^’進而同時 %疋第:輸出電壓Voutl的大小,俾以完成同步整流。相 同的’、第一輸出電壓Vout2更經由電阻R3與R4所组成之一 電阻式電壓分壓器211而回授一個部分的輸出電壓vs2至一 開關#控制電路203。開關控制電路2 〇3利用一内部的比較器 (為簡化說明而未顯示於圖中)來將部分輸出電壓vs2與一 參考電壓比較器(reference v〇ltage generat〇r)212所提Page 12 200412708 V. Description of the invention (8) --- Circuit (_ which is usually completed by a transistor), which is based on the pulse width modulation signal = one shot driving circuit 2206 is turned on / off to control the switch The circuit duty cycle of the switching task 忧 ^^^ is called ^^^^^ 'and then at the same time: the size of the output voltage Voutl to complete the synchronous rectification. Similarly, the first output voltage Vout2 returns a portion of the output voltage vs2 to a switch #control circuit 203 via a resistive voltage divider 211 composed of resistors R3 and R4. The switch control circuit 2 〇3 uses an internal comparator (not shown in the figure for simplicity of description) to compare part of the output voltage vs2 with a reference voltage comparator (reference v〇ltage generatr) 212

供,一第二參考電壓Vref 2做比較,並依此產生脈衝寬度 调變訊號(pulse —width m〇dulati〇n signal,pWM signal)。開關控制電路203内部之一驅動電路(其通常為 電印體所完成)’係根據脈衝寬度調變訊號之一寬度驅 動開關電路207導通/截止,藉以控制開關電路2〇7的開關 任務,期(switching duty cycle),進而同時穩定第二輸 出電壓Vout2的大小,俾以完成同步整流。另一方面,一 内4官理電路(housekeeping circuit,其並未顯示於圖 中)會發出遠端開/關訊號(remote 〇n/〇FF signal)以將輸 出電壓Voutl或Vout2提供至遠端的受電裝置,如主機板或 硬碟等等。 第四圖顯示開關控制電路2 〇 2之一電路示意圖,並且 八電路操作原理將欽述如下。應注意的是開關控制電路 2〇2係與開關控制電路2〇3具有相同的電路結構,並且其電 路操作原理應與開關控制電路203之電路操作原理相似。For comparison, a second reference voltage Vref 2 is compared, and a pulse width modulation signal (pWM signal) is generated accordingly. A driving circuit inside the switch control circuit 203 (which is usually completed by an electronic printer) is to drive the switch circuit 207 on / off according to one of the pulse width modulation signals, thereby controlling the switching task of the switch circuit 207. (Switching duty cycle), and then simultaneously stabilize the magnitude of the second output voltage Vout2 to complete synchronous rectification. On the other hand, a housekeeping circuit (not shown in the figure) will send a remote ON / OFF signal (remote ON / OFF signal) to provide the output voltage Voutl or Vout2 to the remote end. Powered devices, such as motherboards or hard drives, etc. The fourth diagram shows a schematic circuit diagram of one of the switch control circuits 202, and the operation principle of the eight circuits will be described as follows. It should be noted that the switch control circuit 002 has the same circuit structure as the switch control circuit 203, and its circuit operation principle should be similar to that of the switch control circuit 203.

第13頁 200412708Page 13 200412708

開關控制電路202包括一誤差放大器213,i呈古 ^ ^ x w ,. 、 ,、具有一反相輸 A^Unverting terrainal)接收由電壓分壓器21〇所提供 之部分輸出電壓vsi,並且具有一非反相輸入端(n〇n— ” inverting terminal)接收由參考電壓比較器212所提供之 一第一參考電壓Vrefl。電壓分壓器210所提供之部分輸出 電壓VS1係經由誤差放大器213與參考電壓比較器212所提 供之一第一參考電壓Vrefl做比較,並且產生一脈衝寬度 調變訊號輸入至一驅動電路214,其較佳者係由一雙極= 面電晶體(BJT)所建構而成。驅動電路214係根據脈衝訊號 之寬度驅動開關電路2 0 6導通或關閉,藉此調整輸出電壓 的電壓值。 本發明之達成啟動過沖禁止的基本原理,乃是將提供 給用來調整輸出電壓大小的開關控制電路的參考電壓,在 電源轉換器啟動時設定一時間延遲(tiine心13幻並調整其 上升斜率,藉此強迫一輸出電壓於啟動期間内的上升斜率 相對應地改變,意即,使得各個輸出電壓在啟動時間内的 上升斜率趨近一致,而可有效地避免啟動過沖問題的發 生0 請參見第五圖,根據本發明之一較佳實施例之參考電 壓產生為212之一電路結構係包括一比較器3〇1,其具有一 反相輸入端N1接收來自變壓器之二次繞阻端之一 ^二電流 限制感應電壓(inrush current limit sense vQUage) B^ense ’其電壓波形係見於第七圖’以及一非反相輸入端 接收-固定電壓307。比較器3〇1係將突入電流限制感應電The switch control circuit 202 includes an error amplifier 213, i is a ^^ xw,. ,,, has an inverting input A ^ Unverting terrainal) receives a part of the output voltage vsi provided by the voltage divider 21, and has a The non-inverting input terminal (n0n — ”inverting terminal) receives one of the first reference voltages Vrefl provided by the reference voltage comparator 212. Part of the output voltage VS1 provided by the voltage divider 210 is via the error amplifier 213 and the reference A first reference voltage Vrefl provided by the voltage comparator 212 is used for comparison, and a pulse width modulation signal is input to a driving circuit 214. The preferred one is constructed by a bipolar = surface transistor (BJT). The driving circuit 214 drives the switching circuit 206 to be turned on or off according to the width of the pulse signal, thereby adjusting the voltage value of the output voltage. The basic principle of the invention to achieve the overshoot prohibition is provided to adjust The reference voltage of the switching control circuit of the output voltage is set with a time delay when the power converter starts (tiine heart 13 magic and adjust its rising slope to force The rising slope of the output voltage during the start-up period changes accordingly, which means that the rising slopes of the output voltages during the start-up time are nearly the same, which can effectively avoid the occurrence of startup overshoot. 0 Please refer to the fifth figure, According to a preferred embodiment of the present invention, the reference voltage is 212. The circuit structure includes a comparator 3101 having an inverting input terminal N1 for receiving one of the secondary winding terminals from the transformer. Inrush current limit sense vQUage B ^ ense 'The voltage waveform is shown in Figure 7' and a non-inverting input receiving-fixed voltage 307. Comparator 3101 will inrush current limit induction voltage

200412708 五、發明說明(ίο) 壓Bsense與固定電壓307做比較,並且因應比較結果產生 一開關控制訊號VSW至具一上升斜率之線性電壓產生電路 3 1 5之一開關3 0 3。具上升斜率之線性電壓產生電路3丨5包 括開關30 3, 304,一電流源3〇2,一電容CS以及一電壓隨搞 器(voltage f〇ll〇wer) 3〇5。開關303係因應開關控制訊 號VSW之一狀態而切換其開/關狀態,而電容以係具有一端 耦接至一接地端。當開關3〇3位於關閉狀態時,電流源3〇2 向電容cs充電並將能量儲存於電容cs中。當開關3〇3位於 開啟狀態時,電容CS便經由電路節點⑽放電至電壓隨耦器 305之一非反相輸入端,因此位於電壓隨耦器3〇5之一非反 相輸入端上的電壓乃是屬於一具有上升斜率之線性電壓 VCS ’其電壓波形係顯示於第六圖。 一位於電路節點N2之具有上升斜率之線性電壓vcs接著 ,由一電壓隨耦器305而被耦合至電路節點N3。位於電路 節點NJ3上之具有上升斜率之線性電壓Ks接著分別被傳送 至弟多考電壓產生方塊316以及一第二參考電壓產生 方塊3 17中」且分別施加於第一參考電壓產生方塊内部 之一電路節點N5以及第二參考電壓產生方塊31 7内部之一 電路節點N4。 如第五圖所示,本發明之一較佳實施例之參考電壓產 生益212更包含一二極體〇1,其具有一陽極以接收一遠端 開/關讯唬’以及一陰&,其連接至第一參考電壓產生方 塊Μ 6内#之-電路節點N5。關於遠端開/關訊號的電壓波 形係顯示於第七圖。如第七圖所$,當遠端開/關訊號位200412708 V. Description of the invention (ίο) The voltage Bsense is compared with the fixed voltage 307, and a switch control signal VSW is generated according to the comparison result to a linear voltage generating circuit 3 1 5 with a rising slope. The linear voltage generating circuit 3 5 with a rising slope includes switches 30 3, 304, a current source 302, a capacitor CS, and a voltage follower 305. The switch 303 switches its on / off state according to a state of the switch control signal VSW, and the capacitor has one end coupled to a ground terminal. When the switch 3 is in the off state, the current source 30 charges the capacitor cs and stores energy in the capacitor cs. When the switch 3 is in the on state, the capacitor CS is discharged to a non-inverting input terminal of the voltage follower 305 through the circuit node ⑽. Therefore, the capacitor CS is located on a non-inverting input terminal of the voltage follower 30 The voltage is a linear voltage VCS 'with a rising slope. The voltage waveform is shown in the sixth figure. A linear voltage vcs with a rising slope at the circuit node N2 is then coupled to the circuit node N3 by a voltage follower 305. The linear voltage Ks with a rising slope located on the circuit node NJ3 is then transmitted to the Ditoco voltage generation block 316 and a second reference voltage generation block 3 17 respectively, and is applied to one of the first reference voltage generation blocks respectively. The circuit node N5 and the second reference voltage generate a circuit node N4 inside the block 317. As shown in the fifth figure, the reference voltage generating benefit 212 of a preferred embodiment of the present invention further includes a diode 01, which has an anode to receive a remote on / off signal, and a cathode & , Which is connected to the first reference voltage generating block # 6-circuit node N5. The voltage waveform of the remote on / off signal is shown in Figure 7. As shown in Figure 7, when the far-end on / off signal bit

第15頁 200412708 五、發明說明(11)Page 15 200412708 V. Description of the invention (11)

於開啟(0 N)的狀態時,其實際電壓準位為一低電壓,其使 付一極體截止(turn off)且第一參考電壓vreH以及第二 參考電壓Vref2係由具有上升斜率之線性電壓yes來決定。 當运知開/關訊號位於關閉(〇 F F )的狀態時,其實際電壓準 位為一高電壓。倘若在這段期間内的某個時間上,遠端 開/關訊號的電壓準位與上升斜率之線性電壓vcs間的瞬間 值差距小於一極體D1的啟始電壓(threshold value),二 極體D1依然處於關閉狀態,並且第一參考電壓Vref 1以及 第二參考電壓Vref2同樣是由具有上升斜率之線性電壓vcs 來決定。然而遠端開/關訊號的電壓準位與上升斜率之線 性電壓VCS間的瞬間電壓值差距大於二極體pi的啟始電壓 (threshold value),二極體D1便會導通,並且假設二極 體D1為一理想的二極體,意即其並不會在其端點上產生任 何壓降’第一參考電壓產生方塊316内部之一電路節點N5 以及第二參考電壓產生方塊317内部之一電路節點N4將會 接收到遠端開/關訊號於關閉(〇FF)期間所代表之一高電 壓’並且第一參考電壓Vrefl以及第二參考電壓Vref2乃是 由此一高電壓來決定。In the on state (0 N), the actual voltage level is a low voltage, which turns off a polar body, and the first reference voltage vreH and the second reference voltage Vref2 are linear by a rising slope. The voltage is yes. When the operation on / off signal is in the off (0 F F) state, its actual voltage level is a high voltage. If at some time during this period, the instantaneous value difference between the voltage level of the remote on / off signal and the linear voltage vcs of the rising slope is less than the threshold value of the pole D1, the two poles The body D1 is still in the off state, and the first reference voltage Vref 1 and the second reference voltage Vref2 are also determined by the linear voltage vcs with a rising slope. However, the difference between the instantaneous voltage value between the voltage level of the remote on / off signal and the linear voltage VCS of the rising slope is greater than the threshold value of the diode pi, and the diode D1 will be turned on, and it is assumed that the diode The body D1 is an ideal diode, which means that it will not generate any voltage drop at its terminals. One of the circuit nodes N5 inside the first reference voltage generation block 316 and one inside the second reference voltage generation block 317 The circuit node N4 will receive one of the high voltages represented by the remote on / off signal during the off (FF) period, and the first reference voltage Vrefl and the second reference voltage Vref2 are determined by this high voltage.

因此在第一參考電壓產生方塊316中,當遠端開/關訊 號於開啟(0 N)期間内時,節點n 5所接收到的是具有上升斜 率之線性電壓VCS ’其經由一限壓器(voltage limiter) 306而被限制其一峰值電壓(peak v〇itage)於一固定的電 壓準位上,並且所形成的電壓係當作一第一參考電壓 Vrefl ’其電壓波形係顯示於第六圖以及第七圖中於遠端Therefore, in the first reference voltage generating block 316, when the remote on / off signal is within the ON (0 N) period, the node n 5 receives a linear voltage VCS with a rising slope, which passes through a voltage limiter. (Voltage limiter) 306 is limited to a peak voltage (peak vOitage) at a fixed voltage level, and the formed voltage is regarded as a first reference voltage Vrefl ', and its voltage waveform is shown in the sixth Figure and Figure 7 at the far end

第16頁 200412708 五、發明說明(12) 開/關訊號開啟期間内的部份。當遠端開/關訊號於關閉 (OFF )期間内且遠端開/關訊號的電壓準位與上升斜率之線 性電壓vcs間的瞬間電壓值差距大於二極體D1的啟始電壓 (threshold value)時,節點N5所接收到的是遠端開/關訊 藏的向電壓。因此所形成的第一參考電壓”以1將會是具 有固定準位之一直流高電壓,其電壓波形係顯示於於遠端 開/關訊號關閉期間内的部份。 相同地在’在第二參考電壓產生方塊317中,當遠端 開/關訊號於開啟⑺”期間内時,具有上升斜率之線性電 壓VCS被耗合至電路節點N4,並且經由一電壓減法器3 〇 9使 其與固疋電壓3 0 8相減,而得到一減少的電壓 VREDUCED ’其電壓波形係顯示於第六圖。減少的電壓 VREDUCED進一步地由第一象限截波器(first quadrant choppei^310以將其第一象限以外的成份給濾除,而得到 具有二日守間延遲(t ime delay )效應的截波電壓VCH〇ppED, 其電壓波形係顯示於第六圖。截波電壓VChopped再經由一 放大器3 11對其做訊號放大,而得到上升斜率增加之一放 大電壓VAMP,其電壓波形係顯示於第六圖。最後放大電壓 VAMP經由一限壓器312而被限制其一峰值電壓於一固定的 電壓準位上,並且所形成的電壓係當作一第二參考電壓 Vref2 ’其電壓波形亦顯示於第六圖。另一方面,當遠端 開/>關訊號於關閉(0FF)期間内時,遠端開/關訊號所代表 的高電壓會被耦合至電路節點“。這個具有固定準位之直 流高電壓接著會經由電壓減法器3〇 9使其與固定電壓3〇8相Page 16 200412708 V. Description of the invention (12) Part of the ON / OFF signal during the opening period. When the remote on / off signal is in the OFF period and the instantaneous voltage difference between the voltage level of the remote on / off signal and the linear voltage vcs of the rising slope is greater than the threshold value of diode D1 (threshold value ), The node N5 receives the remote on / off signal voltage. Therefore, the first reference voltage formed by "1" will be one of the high DC voltages with a fixed level, and its voltage waveform is shown in the part during the remote on / off signal off period. Similarly, the In the second reference voltage generating block 317, when the remote on / off signal is within the ON period, the linear voltage VCS with a rising slope is consumed to the circuit node N4, and is connected with a voltage subtractor 3 09. The fixed voltage is subtracted from 308, and a reduced voltage VREDUCED is obtained. The voltage waveform is shown in the sixth figure. The reduced voltage VREDUCED is further filtered by the first quadrant choppei ^ 310 to filter out components other than its first quadrant to obtain a cut-off voltage with a two-day delay delay effect. VCH〇ppED, whose voltage waveform is shown in the sixth figure. The cut-off voltage VChoopped is amplified by an amplifier 3 11 to obtain an amplified voltage VAMP, which has an increasing slope. The voltage waveform is shown in the sixth figure. Finally, the amplified voltage VAMP is limited by a voltage limiter 312 to a peak voltage at a fixed voltage level, and the formed voltage is regarded as a second reference voltage Vref2. Its voltage waveform is also displayed in the sixth Figure. On the other hand, when the remote on / off signal is within the OFF (0FF) period, the high voltage represented by the remote on / off signal will be coupled to the circuit node. This DC with a fixed level The high voltage is then passed through a voltage subtractor 309 to make it a fixed voltage 308.

第17頁 200412708 五、發明說明(13) 減’再级由放大器3 11對其做訊號放大,而產生第二參考 電壓Vref2。在這段期間内的第二參考電壓”以2之電壓波 形係顯示於第七圖之相對應的時間區域内。 由上述說明以及各個電路節點之電壓波形可發現,利 用本發明之啟動過沖禁止技術可確實地調整參考電壓的時 間延遲以及上升斜率,可強制各個輸出電壓在電源供應器 啟動期間内的上升斜率趨近一致,而能夠消除在多重輸出 電壓的情況下可能發生的啟動過沖禁止問題。 縱使本發明已由上述之實施例詳細敘述而可由熟悉本 技藝之人士任施匠思而為諸般修飾,然皆不脫如附申請專 利範圍所欲保護者。Page 17 200412708 V. Description of the invention (13) Subtraction 'is again amplified by the amplifier 3 11 to generate a second reference voltage Vref2. The second reference voltage during this period is displayed in the corresponding time region of the seventh graph with a voltage waveform of 2. From the above description and the voltage waveforms of each circuit node, it can be found that the use of the startup overshoot of the present invention The forbidden technology can adjust the time delay and rising slope of the reference voltage positively. It can force the rising slope of each output voltage to be close to the same during the startup period of the power supply, and it can eliminate the startup overshoot that may occur under multiple output voltages. Prohibition Issues: Even though the present invention has been described in detail by the above embodiments and can be modified in various ways by those skilled in the art, it is not inferior to those intended to be protected by the scope of patent application.

第18頁 200412708 圖式簡單說明 第一圖係圖例顯示根據一習用之電源轉換器之一電路 t 不意圖; 第二圖(a)係顯示習用之具有複數個預定直流電壓輸 出之電源轉換器之輸出電壓波形圖; 第二圖(b)係顯示具有複數個預定直流電壓輸出之電 源轉換器之輸出電壓發生啟動過沖現象的波形圖; 第三圖係為本發明之電源轉換器之一電路示意圖; 第四圖係顯示本發明之電源轉換器之開關控制電路之 一電路示意圖; 第五圖顯示本發明之電源轉換器之參考訊號產生器之 馨 一電路示意圖; 第六圖顯示本發明之電源轉換器之參考訊號產生器之 各別内部電路電路節點上之電壓波形圖;以及 第七圖顯示突入電流限制感應電壓,遠端開/關訊 - 號,第一參考電壓以及第二參考電壓之電壓波形圖。Page 18 200412708 Brief description of the diagram The first diagram is a diagram showing a circuit t according to a conventional power converter; the second diagram (a) shows a conventional power converter with a plurality of predetermined DC voltage outputs. Output voltage waveform diagram; the second diagram (b) is a waveform diagram showing a startup overshoot phenomenon of the output voltage of a power converter with a plurality of predetermined DC voltage outputs; the third diagram is a circuit of a power converter of the present invention Schematic diagram; The fourth diagram is a circuit diagram of a switching control circuit of the power converter of the present invention; the fifth diagram is a circuit diagram of the reference signal generator of the power converter of the present invention; the sixth diagram is a schematic diagram of the present invention; Voltage waveform diagrams of the respective internal circuit circuit nodes of the reference signal generator of the power converter; and the seventh diagram shows the inrush current limit induced voltage, the remote on / off signal, the first reference voltage and the second reference voltage Voltage waveform diagram.

第19頁Page 19

Claims (1)

200412708 六、申請專利範圍 1 · 種電源轉換器,用以提供複數個預定的輸出電壓, 其包括: 至少一個磁飽和放大器,每個係磁性耦合一變壓器之 一繞阻上之一交流電壓,並且放大該交流電壓; 至少一個開關電路,耦接於該磁飽和放大器,每個係 因應其開/關操作而將放大之交流電壓轉換成一直流電壓; 至少一個輸出濾波器,耦接於該開關電路,每個係用 以提供一預定的輸出電壓至一負載; ,、至少=開關控制電路,每個係將一輸出電壓與一參考200412708 6. Scope of patent application 1. A power converter for providing a plurality of predetermined output voltages, including: at least one magnetic saturation amplifier, each of which is magnetically coupled to an AC voltage on a winding of a transformer, and Amplify the AC voltage; at least one switching circuit is coupled to the magnetic saturation amplifier, each of which converts the amplified AC voltage into a DC voltage according to its on / off operation; at least one output filter is coupled to the switching circuit , Each system is used to provide a predetermined output voltage to a load;, at least = switch control circuit, each system uses an output voltage and a reference 電壓u比#乂以產生一脈衝寬度調變訊號來控制開關電路 之開/關操作;以及 一參考電壓產生器,耦 別提供一參考電壓至每一個 係使每個預定的輸出電壓在 近一致。 接至該開關控制電路,其係分 開關控制電路,並且參考電壓 啟動期間内之一上升斜率趨 其中該參考 2 ·如申請專利範圍第1項所述之電源轉換器 電壓產生器包括: 、σ 一線性電壓產生電路 之電壓; 用以產生具有一上升斜率特性The voltage u ratio # 乂 generates a pulse width modulation signal to control the on / off operation of the switching circuit; and a reference voltage generator, which couples and provides a reference voltage to each system to make each predetermined output voltage nearly consistent . Connected to the switch control circuit, it is a sub-switch control circuit, and one of the rising slopes of the reference voltage during the start-up period tends to the reference 2 · The power converter voltage generator according to item 1 of the patent application scope includes:, σ The voltage of a linear voltage generating circuit; used to generate a rising slope characteristic -二極體’其具有—陽極以接收一 以及收該具有-上升斜率特性之電壓或, 號之-狀態以接收該具有 該遠端開/關訊-Diode 'which has -anode to receive one and to receive the voltage with -rising slope characteristics or, the state of -to receive the remote on / off signal 200412708200412708 六、申請專利範圍 電壓,並且依據一預定電壓來限制該具有上升斜率 電壓或該具有固定準位之直流高電壓,而產生一第—^生之 電壓;以及 參考 一第二參考電壓產生電路,其係依據該遠端開/關、凡 號之一狀態以接收該具有一上升斜率特性之電壓或代表^ 遠端開/關迅號之一狀態為開啟之具有固定準位之直流古_ 電壓,並且於當該第二參考電壓產生電路接收該具有上 升斜率特性之電壓時,使該具有一上升斜率特性之電壓延 後一段短時間後啟動並且增加其斜率,而產生一第二 電壓。 一专 3 · β如申請專利範圍第2項所述之電源轉換器,其中該參考 電壓產生器更包括一比較器,其係將一突入電流限制感應 電壓與一固定電壓做比較,且因應該比較產生一開關控制 訊號。 4 ·如申請專利範圍第3項所述之電源轉換器,其中該線性 電壓產生電路更包括: 一電流源; 一電容,其具有一端耦接至一接地端; 一開關,耦接於該電流源以及該電容之間,其係因應 該開關控制訊號而開啟/關閉,並且於關閉時使該電流源 對該電容充電,以及於開啟時使該電容充電,而在一電路 節點上建立具有一上升斜率特性之一線性電壓;以及 一電壓隨耦器,用以耦合具有一上升斜率特性之該線 性電壓至其一輸出節點。6. Applying for a patent range voltage, and limiting the DC high voltage with a rising slope or the DC high voltage with a fixed level according to a predetermined voltage to generate a first-generation voltage; and referring to a second reference voltage generating circuit, It is based on the status of the remote on / off and Fan No. to receive the voltage with a rising slope characteristic or represents ^ one of the status of the remote on / off fast No. is on and has a fixed level of the DC ancient voltage. And when the second reference voltage generating circuit receives the voltage with a rising slope characteristic, the voltage with a rising slope characteristic is delayed for a short time to start and the slope is increased to generate a second voltage. A special 3 · β power converter as described in item 2 of the scope of patent application, wherein the reference voltage generator further includes a comparator, which compares an inrush current limit induced voltage with a fixed voltage, and responds accordingly The comparison generates a switch control signal. 4. The power converter according to item 3 of the scope of patent application, wherein the linear voltage generating circuit further includes: a current source; a capacitor having one end coupled to a ground; a switch coupled to the current Between the source and the capacitor, it is turned on / off in response to the switch control signal, and the current source charges the capacitor when it is turned off, and charges the capacitor when it is turned on. A linear voltage having a rising slope characteristic; and a voltage follower for coupling the linear voltage having a rising slope characteristic to an output node thereof. 第21頁 200412708 六、申請專利範圍 5 ·如申請專利範圍第4項所述之 參考電壓產生電政由括一限壓器 率特性之該線性電壓之一峰值電 而產生一第一參考電壓。 6 ·如申請專利範圍第4項 參考電壓產生電路包括: 一電壓減法器,用以將該具 性電壓或該具有固定準位之直流 減’以產生一減少之上升線性電 一第一象限截波器,用以將 第一象限以外的成份移除,以產 上升線性電壓; 一放大器,用以放大具有一 性電壓以增加其一斜率;以及 一限壓器,其係限制該放大 性電壓之一峰值電壓於一預定的 參考電壓訊號。 7·如申請專利範圍第1項 控制電路更包括: 一誤差放大器,其係 壓做比較’而輸出一脈衝 一驅動電路,其係根 而驅動該開關電路導通戍 8 ·如申請專利範圍第7項 電源轉換器,其中該第一 ’其係限制具有一上升斜 壓於一預定的電壓準位, 所述之電源轉換器,其中該第 有一上升斜率特性之該線 高電壓與一固定電壓相 壓或直流電壓; 該減少之上升線性電壓之 生具有一時間延遲效應之 時間延遲效應之該上升線 器所產生之放大的上升線 電壓準位,而產生該第二 所述之電源轉換器,其中該開關 將部份 寬度調 據該脈 關閉。 所述之 之一輸出電壓與一參考電 變訊號;以及 衝寬度調變訊號之一寬度 電源轉換器,其中該驅動 200412708 六、申請專利範圍 — 電路係為一雙極接面電晶體(β j τ)。 9· 一種用於電源轉換器之一參考電壓產生器,其包括· 一線性電壓產生電路,用以產生具有一上升斜率特性 壓; ¥ 弟一參考電壓產生電路’用以依據一預定電壓來限 制具有上升斜率特性之該電壓,而產生一第一參考電壓· 以及 ’ 一第二參考電壓產生電路,用以使具有一上升斜率特 性之該電壓於一段短時間後啟動並且增加該電壓之斜率, 而產生一第二參考電壓。 10·如申請專利範圍第9項所述之參考電壓產生器,更包 括一比較器,其係將一突入電流限制感應電壓與一固定電 壓做比較,且因應該比較產生一開關控制訊號。 11·如申請專利範圍第1〇項所述之參考電壓產生器,其中 該線性電壓產生電路更包括: 一電流源; 一電容,其具有一端耦接i 一接地端; 一開關,耦接於該電流源以及該電容之間,其係因應 該開關控制訊號而開啟/關閉,並且於關閉時使該電流源 對該電容充電,以及於開啟時使該電容充電,而在一電路 節點上建立具有一上升斜率特性之一線性電壓;以及 一電壓隨耦器,用以耦合具有一上升斜率特性之該線 性電壓至其一輸出節點。 12·如申請專利範圍第丨丨項所述之參考電壓產生器,其中Page 21 200412708 VI. Patent application scope 5 • The reference voltage generating circuit described in item 4 of the patent application scope generates a first reference voltage from a peak voltage of the linear voltage including a voltage limiter rate characteristic. 6 · If the patent application scope item No. 4 reference voltage generating circuit includes: a voltage subtractor for subtracting the specific voltage or the DC with a fixed level to generate a reduced rising linear electrical first quadrant cut A wave filter for removing components other than the first quadrant to generate a rising linear voltage; an amplifier for amplifying a voltage having a polarity to increase a slope thereof; and a voltage limiter for limiting the magnification voltage A peak voltage is at a predetermined reference voltage signal. 7 · If the scope of the patent application item 1 control circuit further includes: An error amplifier, which compares the voltage and outputs a pulse and a drive circuit, which drives the switch circuit to turn on. 8 · If the scope of the patent application is 7 Item power converter, wherein the first one is limited to have a rising slope voltage at a predetermined voltage level, the power converter, wherein the first high slope characteristic of the line high voltage and a fixed voltage phase Voltage or DC voltage; the generation of the reduced rising linear voltage, which has a time delay effect, and the time delay effect of the rising line voltage generated by the rising line device to generate the second-mentioned power converter, The switch closes part of the width according to the pulse. One of the output voltage and a reference electrical transformer signal; and a width power converter of a pulse width modulation signal, in which the driver is 200412708 VI. Application for patent scope-The circuit is a bipolar junction transistor (β j τ). 9. A reference voltage generator for a power converter, comprising: a linear voltage generating circuit for generating a characteristic voltage with a rising slope; ¥ a reference voltage generating circuit for limiting based on a predetermined voltage The voltage having a rising slope characteristic generates a first reference voltage · and a second reference voltage generating circuit for starting the voltage with a rising slope characteristic after a short period of time and increasing the slope of the voltage, A second reference voltage is generated. 10. The reference voltage generator as described in item 9 of the scope of patent application, further comprising a comparator, which compares an inrush current limit induced voltage with a fixed voltage, and generates a switch control signal in response to the comparison. 11. The reference voltage generator according to item 10 of the scope of patent application, wherein the linear voltage generating circuit further includes: a current source; a capacitor having one end coupled to i and a ground terminal; a switch coupled to Between the current source and the capacitor, it is turned on / off in response to a switch control signal, and the current source charges the capacitor when turned off, and charges the capacitor when turned on, and is established on a circuit node A linear voltage having a rising slope characteristic; and a voltage follower for coupling the linear voltage having a rising slope characteristic to an output node thereof. 12. The reference voltage generator according to item 丨 丨 in the scope of patent application, wherein 200412708 六、申請專利範圍 限壓器,其係限制具有_ 峰值電壓於一預定的電壓 該第一參考電壓產生電路包拍* 上升斜率特性之該線性電壓之 準位,而產生一第一參考電麈。 13.如申請專利範圍第12項所述之參考電壓產生器,其中 该第一^參考電壓產生電路包括· 一上升斜率特性之該線性 一減少之上升線性電壓; 該減少之上升線性電壓之 生具有一時間延遲效應之 一電壓減法器,用以將具有 電壓與一固定電壓相減,以產生 一第一象限截波器,用以將 第一象限以外的成份移除,以產 上升線性電壓; 器所產生之放大的上升線 電壓準位,而產生該第二 一放大器,用以放大具有一時間延遲效應之該上升線 性電壓以增加其一斜率;以及 一限壓器,其係限制該放大 性電壓之一峰值電壓於一預定的 參考電壓訊號200412708 VI. Patent application voltage limiter, which limits the linear voltage level of the first reference voltage generating circuit with a peak voltage of _ peak voltage to a predetermined voltage, and generates a first reference voltage stag. 13. The reference voltage generator as described in item 12 of the scope of patent application, wherein the first reference voltage generating circuit includes: a linear slope of a rising slope characteristic, a decreasing rising linear voltage; a generation of the decreasing rising linear voltage A voltage subtractor with a time delay effect for subtracting a fixed voltage from a fixed voltage to generate a first quadrant chopper for removing components outside the first quadrant to produce a rising linear voltage ; The amplified rising line voltage level generated by the device, and generating the second amplifier to amplify the rising linear voltage with a time delay effect to increase its slope; and a voltage limiter, which limits the A peak voltage at a predetermined reference voltage signal 第24頁Page 24
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