JP2010063231A - Switching regulator - Google Patents

Abstract

<P>PROBLEM TO BE SOLVED: To provide a switching regulator wherein it is possible to raise output voltage to a target value in a short time without limiting the output of an error amplifier and avoid overshoot. <P>SOLUTION: The switching regulator is so constructed that part of output voltage is fed back to an error amplifier and switching of a switching element is controlled according to the differential amplification output of the reference voltage of a first reference power supply and the part of the output voltage inputted to the error amplifier and direct-current input voltage is thereby converted into direct-current output voltage. When part of output voltage is fed back to the error amplifier and input voltage is converted into output voltage by the switching element in the switching regulator, the part of output voltage and the reference voltage of a second reference power supply are compared with each other and the switching operation of the switching element is stopped according to the result of the comparison. <P>COPYRIGHT: (C)2010,JPO&INPIT

Description

  The present invention relates to a switching regulator, and more particularly to a switching regulator that supplies a predetermined DC voltage to each unit from a DC power source such as a battery in an electronic device such as a digital camera.

  Conventionally, a switching regulator that generates a predetermined DC voltage from a DC power supply such as a battery feeds back a part of the output voltage to an error amplifier, compares it with the voltage of a predetermined reference power supply, and with an operational amplification output of the error amplifier, Slice the triangular wave from the triangular wave oscillator. And a switching element was driven by PWM control by ON_duty based on a slice result, and electric power was supplied from an input power supply. In a switching regulator that performs such an operation, even when the load fluctuates, an operation of always supplying a constant power to the output side is performed by controlling to change the duty.

  As a characteristic of the above switching regulator, a part of the output voltage is fed back to the error amplifier, and the switching operation is performed with the duty according to the load on the output side by the operation amplification output of the error amplifier. Time occurs. As a result, the output response characteristic at the time of starting the switching regulator causes an overdrive phenomenon according to a certain delay time after the output voltage reaches the target value, so that an overshoot of the output voltage (Vout) (for example, FIG. V4) in 1 occurs.

  When an overshoot occurs, a voltage exceeding the rating is supplied to the device that is a load, and the device may be destroyed. Therefore, a circuit that limits the output value of the error amplifier at a constant value is connected to the input side of the error amplifier so that the output of the error amplifier does not exceed a predetermined value at the time of startup. As a result, startup over a relatively long time (hereinafter referred to as “soft start”) is realized, and an overshoot operation is avoided.

However, when starting up using soft start, there is a disadvantage that the startup time of the power source becomes longer and the startup of the system is delayed. Thus, several techniques for avoiding overshoot and shortening the startup time have been proposed (see, for example, Patent Documents 1 and 2).
JP 2007-236051 A JP 2002-84741 A

  However, in the above-described conventional example, there are only techniques for improving the frequency characteristics of the feedback loop using the error amplifier and techniques for raising the output voltage at a plurality of gradients until the target output voltage is reached. In addition, the basic method of feeding back a part of the output voltage to the error amplifier and controlling the switching operation by the output of the error amplifier does not change, so that a certain delay time cannot be eliminated. Thus, in the above conventional example, sufficient measures are not taken to shorten the start-up time as much as possible and avoid overshoot.

  The present invention has been made in view of the above problems, and can increase the output voltage to the target value in a short time without restricting the output of the error amplifier, and avoid overshoot. An object is to provide a possible switching regulator.

  In order to achieve the above object, a switching regulator according to claim 1, wherein a part of an output voltage is fed back, and a differential amplification is performed according to a reference voltage of a first reference power supply inputted and a part of the output voltage. In a switching regulator comprising: an error amplifier that performs output; and a switching element that converts a DC input voltage into a DC output voltage by performing switching control according to a differential amplification output from the error amplifier. And a logic circuit for stopping the switching operation of the switching element in accordance with a comparison result by the comparator.

  In order to achieve the above object, a switching regulator according to claim 2, wherein a part of an output voltage is fed back, and a differential amplification is performed according to a reference voltage of a first reference power supply inputted and a part of the output voltage. In a switching regulator comprising: an error amplifier that performs output; and a switching element that converts a DC input voltage into a DC output voltage by performing switching control according to a differential amplification output from the error amplifier. A comparator that compares a part of the reference voltage with a reference voltage of a second reference power supply that can be set to an arbitrary voltage level at an arbitrary timing, and a logic that stops the switching operation of the switching element according to the comparison result by the comparator A circuit, and control means for changing a reference voltage of the second reference power supply after a predetermined time from the start of the switching operation. And butterflies.

  According to the present invention, when a part of the output voltage is fed back to the error amplifier and the input voltage is converted into the output voltage by the switching element, the part of the output voltage is compared with the reference voltage of the second reference power supply. The switching operation of the switching element is stopped according to the comparison result. As a result, the output voltage can be raised to the target value in a short time without limiting the output of the error amplifier, and overshoot can be avoided.

  According to the present invention, a part of the output voltage is compared with the reference voltage of the second reference power supply that can be set to an arbitrary voltage level at an arbitrary timing, and the switching operation of the switching element is stopped according to the comparison result. . Then, the reference voltage of the second reference power supply is changed after a predetermined time from the start of the switching operation. As a result, it is possible to make the overshoot avoidance operation effective only at the time of start-up, and thereafter to perform switching control according to the output of the error amplifier, and control at the target output voltage becomes possible.

  Hereinafter, embodiments of the present invention will be described in detail with reference to the drawings.

[First Embodiment]
FIG. 1 is a diagram showing a circuit configuration of a switching regulator according to the first embodiment of the present invention. Note that the illustrated switching regulator is configured by a step-down switching converter circuit.

  In FIG. 1, reference numeral 1 denotes a battery serving as a power source for operating a device. Reference numeral 2 denotes an input capacitor of the step-down switching converter circuit, which is connected in parallel with the battery 1. A switching element 3 is connected between the input capacitor 2 and the cathode of the diode 4 and performs a switching operation. Since the illustrated example is a step-down switching converter circuit, the switching element 3 is configured by a PMOS transistor, but is not limited thereto. A pre-driver 14 for controlling this is connected to the gate of the switching element 3.

  The diode 4 has an anode connected to the GND and a cathode connected between the inductor 5 and the switching element 3. The diode 4 secures a current route through which energy stored in the inductor 5 that is a choke coil is discharged to the output capacitor 6 when the switching element 3 is turned on. The inductor 5 is connected between the switching element 3 and the output capacitor 6. The inductor 5 stores energy due to a current change during the operation of the switching element 3. The output capacitor 6 accumulates energy released from the inductor 5 and smoothes the output voltage (Vout) at the output terminal 50. Reference numeral 24 denotes a load of a device incorporating the illustrated switching regulator, and various electronic devices such as MPU and DSP are assumed.

  Reference numerals 7 and 8 denote voltage dividing resistors for dividing the output voltage of the step-down switching converter circuit at the output terminal 50. Reference numeral 23 denotes a voltage dividing point where the output voltage of the step-down switching converter circuit is divided by the resistors 7 and 8. 9 is an error amplifier, the inverting input side is connected to the voltage dividing point 23 side, one non-inverting input side is connected to the first reference power supply Vref1_22, and the other non-inverting input side is connected to the third reference power supply Vref3_25. The The output terminal of the error amplifier 9 is configured to be fed back to the inverting input side of the error amplifier 9 through the feedback capacitor 11 and the feedback resistor 10. As a result, the voltage value of the voltage dividing point 23 for dividing the output voltage is compared with the lower value of the reference voltage of the first reference power supply Vref1_22 and the reference voltage of the third reference power supply Vref3_25, and the differential Amplified output is output.

  Reference numeral 19 denotes a constant current circuit for generating a reference voltage of the third reference power supply Vref3_25, and reference numeral 20 denotes a power supply for constituting the constant current circuit 19. A capacitor 21 is charged by the constant current circuit 19. Reference numeral 18 denotes a transistor for discharging the electric charge accumulated in the capacitor 21. The capacitor 21 is discharged as an initial operation by the inverter 17 and the pull-down resistor 16 at the input of the inverter 17. The operation of the third reference power supply Vref3_25 differs depending on the capacitance value of the capacitor 21. For example, the smaller the constant of the capacitor 21, the shorter the rise time of the third reference power supply Vref3_25. In addition, the larger the constant of the capacitor 21, the longer the rise time of the third reference power supply Vref3_25.

  The output terminal of the error amplifier 9 is connected to the non-inverting input terminal of the comparator 12 that is a comparator. Reference numeral 13 denotes a triangular wave oscillator (OSC) that always outputs a triangular wave having a constant period, and is connected to the inverting input terminal of the comparator 12. As a result, the triangular wave from the triangular wave oscillator 13 is sliced by the output of the error amplifier 9, and the higher the output value of the error amplifier 9, the higher the duty ratio PWM output is output from the output of the comparator 12. On the other hand, when the output value of the error amplifier 9 is low, the PWM output is low. Further, when the output value of the error amplifier 9 is low, PWM output is not performed.

  Reference numeral 31 denotes a comparator (comparator) having a predetermined hysteresis voltage for preventing overshoot. The non-inverting input terminal is connected to the second reference power supply Vref2_32 and the inverting input terminal is connected to the voltage dividing point 23. Reference numeral 30 denotes a NAND gate which is a logic circuit, and an output terminal from the comparator 12 and an output terminal from the comparator 31 are connected to an input terminal. Thereby, when the value obtained by dividing the output voltage of the switching regulator by the voltage dividing resistors 7 and 8 is lower than the reference voltage of the second reference power supply 32, the output of the comparator 12 is output as it is. On the other hand, the output of the comparator 12 is disabled only when the voltage at the voltage dividing point 23 exceeds the reference voltage of the second reference power supply Vref2_32. The pre-driver 14 drives the switching element 3. The output of the pre-driver 14 swings between the voltage level of the battery 1 and the GND level.

  Reference numeral 15 denotes an MPU for controlling the operation of the switching regulator, which is connected to the input terminal of the inverter 17 and controls the start and stop of the operation of the switching regulator.

  Next, the operation of the switching regulator of FIG. 1 will be described with reference to FIG.

  FIG. 2 is a diagram illustrating output waveforms of respective units during the operation of the switching regulator of FIG.

  In FIG. 2, Vout is the output voltage of the switching regulator, and rises to the target output voltage V1 with a constant slope. / Disable is a PWM-driven disable signal. / PWM is a PWM signal from the pre-driver 14. The load current is a load current 53 of the load 24.

  First, when the MPU 15 switches the control terminal for the inverter 17 from Low to Hi, the inverter 17 becomes Low output and the transistor 18 is turned OFF. Then, the potential of the third reference power supply Vref3_25 gradually rises to the potential of the first reference power supply Vref1_22 in a certain time according to the current value of the constant current circuit 19 and the capacitance value of the capacitor 21, and the voltage dividing point 23 A differential voltage with the voltage value of is generated. In the error amplifier 9, the differential output voltage rises. In the comparator 12, the rate at which the output value of the error amplifier 9 exceeds the output value of the triangular wave from the triangular wave oscillator 13 is large, and PWM driving with a relatively high duty is performed. As a result, during the output rise time t1, the Vout, disable signal, and PWM signal have operation waveforms as shown in the figure. As described above, the output rise time t1 is controlled by a relatively large On_duty.

  Next, even if Vout reaches the target output voltage V1, as described above, the output voltage value is fed back to the error amplifier 9 to control On_duty. As a result, since a certain delay time occurs, Vout tries to overdrive the delay time. However, when the voltage value at the voltage dividing point 23 reaches the output value of the second reference power supply Vref2_32, the disable signal at the output terminal 51 of the comparator 31 becomes a Low output instantaneously (in a time significantly shorter than the delay time). . The PWM signal at the output terminal 52 of the pre-driver 14 becomes Hi output (Off logic), and the switching element 3 stops the switching operation during the period t5. As a result, Vout does not become a voltage equal to or higher than the output voltage value V2 corresponding to the second reference power supply Vref2_32.

  Next, when the switching operation of the switching element 3 is stopped for the period t5, the output of the switching regulator decreases. Then, it falls below the voltage that is lower than the output value of the second reference power supply Vref2_32 by the hysteresis of the comparator 31, and the output terminal 51 of the comparator 31 becomes Hi output. Then, the PWM signal is output again from the pre-driver 14, and the output voltage Vout of the output terminal 50 increases.

  As described above, the period in which the operation for preventing overshoot is repeated is t2. By this control, Vout rises only by a very small value V3 with respect to the target output voltage V1, and can be controlled to be less than V2. As a result, an overshoot that destroys the load 24 during the period t2 can be prevented. If the comparator 31 does not operate, an overshoot corresponding to V4 occurs with respect to the target output voltage V1, a voltage exceeding the rating is applied to the load 24, and the load 24 may be destroyed. There is.

  In the present embodiment, since the comparator 31 operates without delay with respect to the output change of Vout, the capacitance value of the capacitor 21 is reduced or the constant current value of the constant current circuit 19 is relatively increased. Thus, even if the slope of the output rise time t1 in FIG. 2 is made steep and the time t1 is shortened, overdrive of Vout does not occur and no problem occurs.

  The steady drive period t3 shows a stable state with a constant load current operation after Vout rises. Even when the load fluctuates in the middle, when the load current 53 changes from a relatively small value to a relatively large value, the waveform of Vout becomes small, so that control by the output of the comparator 31 is not performed. t4 indicates the time until the output voltage returns to the target output voltage V1 when the load current fluctuates.

  When the load current 53 decreases from a relatively large value, Vout increases, and the voltage value at the voltage dividing point 23 exceeds the output voltage value V2 corresponding to the second reference power supply Vref2_32. Then, the PWM signal at the output terminal 52 of the pre-driver 14 becomes Hi output (Off logic) by the operation of the comparator 31, and the switching operation of the switching element 3 is stopped. Therefore, the overshoot of Vout does not occur more than the output voltage value V2 corresponding to the second reference power supply Vref2_32. If the comparator 31 does not operate, the voltage V5 increases, the output voltage fluctuates, and the time for the output voltage to return to the target output voltage V1 also increases to t4.

  As described above, it is possible for the comparator 31 to stop the switching operation without delay time for overshoot that occurs on the output side when the load current instantaneously changes from a relatively large value to a relatively small value. Become. As a result, it is possible to avoid overshoot when the load fluctuates.

  As described above, according to the first embodiment, when the input voltage is converted into the output voltage by the switching element, a part of the output voltage is compared with the reference voltage of the second reference power supply, and the comparison result In response to this, the switching operation of the switching element is stopped. As a result, it is possible to start up in a short time while avoiding overshoot at the start-up in the switching regulator, to shorten the system start-up time, and to reduce overshoot at the time of load fluctuation.

[Second Embodiment]
Next, a switching regulator according to a second embodiment of the present invention will be described. In addition, about the part similar to 1st Embodiment, the description is abbreviate | omitted using the same code | symbol.

  FIG. 3 is a diagram showing a circuit configuration of a switching regulator according to the second embodiment of the present invention.

  In FIG. 3, a DA converter 40 capable of varying the voltage is connected to the non-inverting input terminal of the comparator 31 as a second reference power supply. The DA converter 40 is connected to the MPU 15. The MPU 15 as the control means can change the output of the second reference power supply to an arbitrary voltage level with respect to the DA converter 40 at an arbitrary timing.

  Next, the operation of the switching regulator of FIG. 3 will be described with reference to FIG.

  FIG. 4 is a diagram illustrating output waveforms of respective units during the operation of the switching regulator of FIG.

  In FIG. 4, Vout is an output voltage of the switching regulator, and rises to a target value (target output voltage) V10 with a constant slope. / Disable is a PWM-driven disable signal. / PWM is a PWM signal from the pre-driver 14. The load current is a load current 53 of the load 24.

  In the present embodiment, the voltage value Vda1 is greater than the target value V10 due to the relationship between the output error of the DA converter 40 and the output error of the first reference power supply Vref1_22, the input offset error of the error amplifier 9, the input offset error of the comparator 31, and the like. Assume that the number falls below. The MPU 15 sets the output of the DA converter 40 to a voltage corresponding to the first level voltage value Vda1 in terms of Vout.

  First, the switching regulator starts to operate when the MPU 15 switches the control terminal for the inverter 17 from Low to Hi. In the period T1, the operation is performed while the output of the DA converter 40 is maintained at a voltage corresponding to the first level voltage value Vda1 in terms of Vout. Thereby, Vout in the period t2 shown in FIG. 2 rises to the voltage value Vda1, and then the comparator 31 and the error amplifier 9 perform the same operation as in the first embodiment. This period T1 is after the output voltage value is fed back to the error amplifier 9 and the ON_duty control is performed after the output voltage value reaches the target value V10 until a certain delay time occurs. Is the time.

  Next, in the period T2 after the period T1, the setting of the output of the DA converter 40 is changed so as to become a second level voltage value Vda2 that is relatively larger than the voltage value Vda1 in terms of Vout. As a result, the disable signal always becomes Hi output, and the control is performed by the method of controlling the ON_duty by feeding back the output voltage value to the error amplifier 9 as described above.

  Even when the voltage value Vda1 falls below the target value V10 due to the relationship between the output error of the DA converter 40 and the output error of the first reference power supply Vref1_22, the target value V10 is slightly lower in the startup period T1. The drive voltage range of the load 24 is about the same. In the period T1, it is possible to perform an activation operation in a short time while avoiding overshoot, and the system activation time can be shortened. In a steady state after the start-up, the output voltage value can be fed back to the error amplifier 9 to control the ON_duty, and can be controlled with the target value V10.

  On the other hand, when the voltage value Vda1 exceeds the target value V10, the operation shown in FIG. 2 in the first embodiment is performed. Then, the operation with the overshoot of the voltage V3 can be performed at the time of startup, and the output voltage value can be fed back to the error amplifier 9 to control the ON_duty during the steady state after the startup, and the control can be performed with the target value V10. Can do.

  As described above, according to the second embodiment, a part of the output voltage is compared with the reference voltage of the second reference power supply that can be set to an arbitrary voltage level at an arbitrary timing, and according to the comparison result. The switching operation of the switching element is stopped. Then, the reference voltage of the second reference power source is changed by the MPU 15 after a predetermined time from the start of the switching operation. As a result, it is possible to make the overshoot avoidance operation effective only at the time of start-up, and thereafter to perform switching control according to the output of the error amplifier, and control at the target output voltage becomes possible.

  The reference voltage of the second reference power supply is set to the first level voltage value Vda1 from the start of the switching operation to a predetermined time (T1), and after the predetermined time (T2), the second voltage greater than the voltage value Vda1 is set. The setting is changed to the level voltage value Vda2. Thereby, the above effect can be further obtained.

It is the figure which showed the circuit structure of the switching regulator which concerns on the 1st Embodiment of this invention. It is a figure which shows the output waveform of each part at the time of the switching regulator operation | movement of FIG. It is the figure which showed the circuit structure of the switching regulator which concerns on the 2nd Embodiment of this invention. It is a figure which shows the output waveform of each part at the time of the switching regulator operation | movement of FIG.

Explanation of symbols

1 Battery 3 Switching element (PMOS)
9 Error amplifier 12 Comparator 14 Pre-driver 15 MPU
22 First reference power supply Vref1
23 Voltage Voltage Dividing Point 24 Load Circuit 25 Third Reference Power Supply Vref3
30 NAND gate 31 Comparator 32 Second reference power supply Vref2

Claims (4)

An error amplifier that feeds back a part of the output voltage and performs differential amplification output in accordance with the reference voltage of the first reference power supply and the part of the output voltage, and a differential amplification output from the error amplifier In a switching regulator comprising a switching element that converts a DC input voltage into a DC output voltage by performing switching control accordingly,
A comparator that compares a portion of the output voltage with a reference voltage of a second reference power supply;
A switching regulator comprising: a logic circuit that stops a switching operation of the switching element according to a comparison result by the comparator. An error amplifier that feeds back a part of the output voltage and performs differential amplification output in accordance with the reference voltage of the first reference power supply and the part of the output voltage, and a differential amplification output from the error amplifier In a switching regulator comprising a switching element that converts a DC input voltage into a DC output voltage by performing switching control accordingly,
A comparator that compares a portion of the output voltage with a reference voltage of a second reference power supply that can be set to an arbitrary voltage level at an arbitrary timing;
A logic circuit for stopping the switching operation of the switching element according to a comparison result by the comparator;
And a control means for changing a reference voltage of the second reference power supply after a predetermined time from the start of the switching operation.   The control means sets the reference voltage of the second reference power supply to the first level from the start of the switching operation to a predetermined time, and after the predetermined time, changes the setting to a second level larger than the first level. The switching regulator according to claim 2, wherein:   The switching regulator according to claim 1, wherein the comparator has a predetermined hysteresis voltage.

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