SU987838A1 - Digital signal regenerator - Google Patents

Description

(54) DIGITAL SIGNAL REGENERATOR

The invention relates to communication technology, in particular to digital transmission systems. A device for regenerating a digital signal is known, comprising a series-connected amplifier, subtraction unit, another input which is connected to the first input of the comparator and the output of the analysis and generation unit, a step voltage, the first input of which is connected to the second input of the comparator, the outputs of the decision unit, the input of the output unit, and the second input of the unit for the analysis and formation of step voltage is connected to the output of the comparator, the output of the subtraction unit is connected to the third input of the comparator and the first input of the This unit is connected to the output of the synchronization unit 1. The known device has low noise immunity due to the incompatibility of the reference voltage generation circuit. .. The purpose of the invention is to increase the stability of the digital signal. Dp achieve the goal in the digital signal regenerator, containing an amplifier-corrector, the output of which is connected to the first 6jteKa subtraction input and to the input of the synchronization unit, the output of which is connected to the first input of the decision unit, the output of which is connected to the input of the input unit and to the first input of the analysis unit and the formation of a step voltage, the output of which is connected to the second input of the subtraction unit and the first input of the comparator, the output of which is connected to the second input of the unit for the analysis and formation of the stepToro voltage , a peak detector, a delay line, and a differentiating circuit, the input of which is connected to the output of the input unit and the output connected to the first input of the peak detector, the second input of which is connected to the second input of the decision unit, which is connected to the output of the subtraction unit, the output of the peak detector connected to the second input of the comparator, the third input of which is connected to the output of the delay line, the input of which is connected to the output of the complete unit. FIG. 1 shows the structural electrical circuit of the digital signal regenerator; in fig. 2 diagrams of operation of individual units of the device.

The digital signal regenerator contains an amplifier corrector 1, a subtraction unit 2, a comparator 3, a block 4 for analyzing and forming a step voltage, a decisive block 5, a synchronization block 6, an input block 7, a peak detector, 8, a delay line 9, a differentiating circuit ten.

The device works as follows.

The digital signal from the output of the amplifier-corrector 1, distorted by line and interference, receives a significant jitter at the input of synchronization unit 6 and the first input of subtraction unit 2, the second input of which is supplied with a reference voltage from the output of analyzing step 4 and forming a step voltage. FIG. 2a shows one of the possible implementations of a digital signal at the output of the peak detector 8, where the dotted line shows the limits at which the fronts can be unchanged in amplitude of digital signals due to phase distortions, L U is the voltage change limit at the information input of the comparator 3 in the prototype regenerator B- moment of gating. FIG. 2 b shows the signal at the output of the peak detector 8, where the shaded area means the limits of the front offset of the input digital signal due to phase jitter.

The signal from the output of the peak detector 8 is fed to the second input of the comparator 3, the first input of which receives the reference voltage from the output of the analysis unit 4 and the formation of a step voltage. The third input of the comparator 3 receives a gating pulse from the output of line 9 of the delay, delayed by about a quarter of the clock interval (Fig. 2d) compared with the pulses at the output of the transmitting unit 5 (.fig. 2c), which are formed during the simultaneous action of the pulse from the output of block 2 subtraction to the second input of the decision block 5, the first input of which is affected by a pulse from the output of the synchronization block b. The comparator 3 has a large input impedance, and therefore, the output of the peak detector 8 maintains the amplitude values of the pulses received at its input after their termination (Fig. 2b) until the first input of the peak detector 8 has effect and the pulse, which causes it each time the initial state coming from the output of the differentiating circuit 10 (Fig. 2e), to the input of which a pulse is fed from the output of the input unit 7 (Fig. 2e).

 Thus, at the output of the peak detector 8, the true values of the pulse amplitudes are remembered and these values are compared to the reference voltage at the time of the comparator 3 gating by pulses from the output of the delay line 9, so that the amplitude of the regenerator input signal is changed, so as a phase jitter at the input pulses will no longer cause a voltage change at the information input of the comparator 3 at the time of gating with a constant amplitude of the input pulses, which It is intended to increase the accuracy of the formation of the reference voltage and, as a result, to increase the noise immunity of the digital signal regenerator.

The use of the invention makes it possible, by reducing the influence of the jitter of the phase of information pulses, achieved by pre-storing the amplitude values of the IN of formational pulses for further analysis. To increase the noise immunity of the regenerator.

Claims (1)

1. USSR author's certificate in application number 2964479/09, cl. H 04 L 25/06, 1980.