SU983577A1 - Digital phase shifting device - Google Patents

Description

the input of the second comparison unit, the pulse generator is connected to the counting input of the first pulse counter and to the input of the input signal generator / output of the first pulse counter via the first comparison unit 5 is connected to the output of the reversible counter. The first comparator block and the counter, as well as the second comparator block and the counter, form the guide of the eFvl frequency divide, the division factor 10 of which in the first case is specified by the eversive counter, and in the second sensor of the C 23 code

The disadvantages of the known device are the complexity and low speed associated with a prolonged exit time to a steady state.

The purpose of the invention is to increase the efficiency and simplify the device. 20

The goal is achieved by the fact that a digital phase shifter containing a code setter,. connected to the control inputs of the first divider, whose input is connected to the output of the key, a pulse generator, the output of which is connected to the driver of the input signal,

the input of which is connected to the input terminal of the device, and the output with the first. the input of the phase detector, the output of which is connected to the first key input and the output terminal of the device, the second divider, the first and second counters, is entered a shaper of short pulses, and the output of the short pulse shaper is connected to the inputs of the zero-first counter and the second divider, and the input is with the input of the input driver and the recording input, the second is the 40th counter, the output of the second divider is connected to the input of the first counter, and the input is connected to the output of the generator and the second input of the key, the information inputs of the second tchika soeg- dineny 45 with the first counter outputs the count input - with the output of the first divider, and an output - to a second input of the phase detector.

. The drawing shows a diagram 50 of a digital phase shifter.

The device consists of a driver 1, a driver 2 short pulses, counters 3 and 4, a divider 55 5 for a constant number, a control divider b, a dial 7 of the code, a key 8, a phase detector 9 and a generator 10.

The device works as follows: Q.

When the reference voltage passes through zero at the output of the driver 1 synchronously with the pulses of the signal from the generator 10 A pulse is formed, 65

whereby the contents of counter 3 are written to counter 4, and the phase detector 9 is set to one, thereby unlocking key 8.

Thus, at the input of the counter (and the input that subtracts it), pulses with a frequency of

F .f / K,, (1) where. - frequency generator 10

k is the division ratio of the controllable divider 6, which is defined by the unit 7 of the code.

At the end of the pulse formed by shaper 1, at the output of the additional shaper 2 short pulses, a 4-pulse reset divider 5 and counter 3 appear to zero, and in the counter 3 pulses start to accumulate again

F

(2)

where k is the division factor of divider 5.

For the period T of the reference signal Upri in the counter 3 is the number N Tj, rt-F ,,, (3) The same number from the counter 4 is subtracted to zero in time

T (4)

At the moment of equality of the zero content of the counter 4, a signal appears at its output, resetting the phase detector 9 to zero. Substituting expressions (1) and (3) into expression (4), we obtain

C- ™ op / k

those. if k3 360, then T is the phase shift in electrical degrees, which is set by the unit 7 of the code relative to the zero of the phase of the reference signal U (} n. The output of the device is the output of the phase detector.

Thus, the device with the same resolution in part of the reference frequency band has a higher speed and simplicity.

Claims (2)

1. Authors certificate of the USSR 526068, cl. H 03 K 3/13, 1974. 2. Authors certificate of the USSR 759878, cl. G 01 R 25/04, 1978.