SU982190A1 - Digital integrating voltmeter - Google Patents

Description

one

The invention relates to electrical measuring equipment, namely, to integrating digital devices of stochastic transformation, designed to measure the actual value of deterministic and random signals, and can be used in power engineering, communication technology, in the production and testing of various electronic devices and systems, a TaiTOe is in the process of a scientific experiment.

A known digital correlating digital meter of the effective value of the signal contains a clock pulse j pulses, a code-to-analog converter, two gated comparators and a digital readout unit 1.

However, in this integrating voltmeter, a stochastic conversion method 20 is used, characterized by a strong error (conversion error of the type of signal and a large maximum value thereof).

The closest to the invention according to the technical essence is a voltmeter of integration with a new integration, the principle of action of which is based on a stochastic signal transformation method containing an adder, as well as a code-analog converter, the direct and inner outputs of which are connected to the first inputs of two gated comparators, the second inputs of which are combined and are the input of the device, the outputs are combined by the OR element, and the gating inputs. connected to the output of the clock pulse generator, which is also connected via a large-scale counter to the control input of the digital reference block 2.

However, the known device is characterized by insufficient accuracy, namely, a significant dependence of the conversion error on the type of signal.

The purpose of the invention is to improve the measurement accuracy. 398 This goal is achieved by the fact that an 8 digital integrating voltmeter containing an adder, a code-to-analog converter, the direct and inverse outputs of which are connected to the first inputs of the first and second gated comparators, respectively, the second inputs of which are combined and connected to the input bus, the outputs are connected to per BUM and the second inputs of the element OR. and the gating inputs are connected to the output of the clock generator, and through a large-scale counter to the control input of the digital readout block, the block is additionally inputted by inverters of codes and connected to the output of the clock generator by a two-channel pseudo-random number generator, the outputs of which are connected through an adder and a code integrator the code-analogue to the converter input, the transfer output of the adder is connected to the control input of the code inverting unit, and the output of the OR element is connected to the clock input home block digital readout. In the drawing) shows a functional diagram of a digital integrating voltmeter. The digital integrating voltmeter contains two gated comparators 1 and 2, the second inputs of which are combined and connected to the input bus, and the first inputs are connected to the direct and inverse outputs of the converter 3 code-analogue. The outputs of both gated comparators 1 and 2 are connected to the first and second inputs of element 4 OR, the output of which is connected to the clock input of the digital readout unit 5, the control input of which is connected to the output of the scale counter 6. The output of the clock generator 7 is connected to the inputs of the gating of both comparators 1 and 2, as well as to the clock input of a large-scale counter 6 and a two-channel generator of 8 pseudo-random numbers, whose information outputs are connected to the corresponding 101 input of the adder-9. The adder 5) through the block 10 invert codes connected to the input of the converter 3 code-equivalent. The transfer output of the adder 9 is connected to the control input of the code inversion unit 10. 04 random signal converter 3 code-analog j. Due to the joint inclusion of a two-channel generator 8 pseudorandom numbers, adder 9 and code inverting unit 10, the probability density of pseudorandom numbers that occur at the output of the two-channel generator increases linearly and is quite accurately described by a function m where A is the upper limit of the range of the measured signal. The operation of these three blocks is as follows. Under the influence of the clock pulses of the generator of 7 clock pulses, a two-channel generator of 8 pseudorandom numbers generates a pair of D-bit independent and uniformly distributed numbers / x. , {,. In adder 9, these numbers are added, and at the output of block 10 inversion of codes, the numbers f are formed according to the following rule .llL 2 if 2 In order for the dispersion to estimate the effective value of the signal to become stable, the following estimates of the unit transformation should be averaged, 2. if f, , -; (t, -) f .-, if.). Since the implementation of the two-channel 8 pseudo-random number generator is known in advance, the sum of all A2 / 2f is known in advance, which is stored as the initial setting in block 5 of the digital reference. With equal e or multiples of the scale 1 1 6 period of a two-channel gheerator 8 pseudo-random numbers this umma is equal to zero. In any case, the estimated square of the instantaneous value of si-α X 2 (ti) is simplified.

Claims (2)

Both gated comparators 1 and 2 are compared at times t | input signal x (ti) with analog pseudo Measurement of the effective value of the input signal occurs cyclically. At the end of the previous measurement cycle, the overflow signal of the scale counter 6 in block 5 of the digital readout initiates the command for issuing the measurement result and setting the initial state of the number-pulse square root extractor. After this, the next clock pulse of the generator of 7 clock pulses, acting on a two-channel generator of 8 pseudorandom numbers, provides for the output of the converter 3 a code analogue of equal but different polar polar pseudorandom variables, having a linearly increasing distribution density function. Both gated comparators 1 and 2 at the time of gating by the falling edge of the pulse of the generator 7 clock pulses compare the absolute value of the input signal with a pseudo-random value, If at the time of gating the input signal exceeds the pseudo-random value, then at the output of the element k OR by is a pulse that is processed by a number-pulse extraction1) by the square root of the digital reading unit 5. This process continues until the next overflow of the scale counter 6. On the basis of the calculations, it has been established that for the proposed device, a single unit estimate is constant and equal to 0.0833. Compared to the prototype, this is better both in terms of the average dispersion (0.1166) and in terms of the maximum value of the dispersion (0.3388). Thus, the introduction of 9 06 fresh blocks and connections causes an increase in accuracy and an increase in its stability. DETAILED DESCRIPTION OF THE INVENTION A digital integrating voltmeter comprising an adder, a code-to-analog converter, the forward and inverse outputs of which are connected to the first inputs of the first and second gated comparators, respectively, the second inputs of which are combined and connected to the input bus, the outputs are connected to the first and second inputs of the OR element , and the gate input podkle (to the output of the clock generator and through a large-scale counter to the control input of the digital readout unit, characterized in that, in order to improve the accuracy measurements, a code inversion block and a two-channel pseudo-random number generator connected to the clock pulse generator output are added to it, the outputs of which are connected to the code converter inverter input through the adder and code inverter block, and the transfer output of the adder is connected to the control input of the code inverting block, the output of the OR element is connected to the clock input of the digital readout block.Sources of information taken into account in examination 1, USSR Copyright Certificate No. 600721, cl. H 03 K 13/02, 1977. 2. USSR author's certificate N, cl. H 03 K 13/20, 1978 (prototype).