SU963074A1 - Character generator - Google Patents

Description

(54) GENERATOR 3HAKOEV,

, -one :

The invention relates to computing technology and can be used in the design of display devices.

A known character generator containing: triggers, AND, OR elements. For each character with: there is a generator, defining the program for painting the character G1.

In the most technical aspect of the invention, there is a sign torus containing adders, a synchronous generator, a memory unit, a converter of a pozgga code in parallel and.

The main disadvantage of the known devices is the limited speed of operation.

The purpose of the invention is to increase the speed of the device.

The goal is achieved by the fact that in the character generator, which contains sums of X and Y coordinates, some inputs of which are connected to Tires of the signals of the address code of the coordinates X and Y, s 1 inputs - to tjgin f signals of the codes

Dinatam X and Y, a memory block, one input of which is connected to the bus of the signal of the sign code, another input - to the first output of the synchronizer and another input of the adder along the Y coordinate, the converter of the positional code into a parallel one, the input of which is connected to one of the input of the raiser the illumination signals, the output with another input cyM jaTopa at the X coordinate, the second output of the sync generator is connected to another input of the photogenerator, a shift register is entered, the first input of which is connected to the second output of the synchronizer, the second input is the third output; synchronizer, the third input is with the output of the memory block, one register output is connected to one of the inputs of the illumination signal generator, another output of the synchronizer input.

The shift register contains triggers, serially connected switches and an OR element, one of the trigger inputs is the first input of the shift register, the first and second inputs of the first switch 3 are the second input of the register. The third inputs of the switches enter the third input of the register, the other cog / mutator outputs are connected to other inputs, triggers, the outputs of which are one of the outputs of the shift register, output pi. the next trigger trigger is another input of the element, OR, the output of which is another output of the redist. The drawing shows a simplified symbol generator circuit. It contains the adder 1 by the coordinate - X, the adder 2 by the coordinate Y, the memory block, the synchronizer 4, the shift register 5, triggers;: 6, kg 1mutatoe 7, the driver 8 sigvali backlight, the transducer 9 positional code in parallel, the element 10 OR, descrambler 11 and element 12 I. The generator works as follows. For example, consider the generation; Op with a matrix of the sign 5 f 7 then “EC. According to the sign code of block 3 of memory, the matrix code of the required sign is selected. . On a signal from the synchronizer, the 4th postutut on the mat day 2 ir / co. Hnat U, where the sum is, is dipped with the .jjeca U code, and in memory block 3, the code for the first line of the string. Block 3 generates the positional code of the points of the sign that goes to the g inputs of the switches 7. Assume that this is a LOD 01О1О. About the input of the first commutator, O arrives at the input of the second switch, 1 third of it — O of the fourth — 1 and p 0. At the beginning of each line is a synchro-op 4 you. years at the inputs a, b of the first commator long-term pulse of the beginning of the line. Since the kszhsmututator works according to the logic ni- (q + b) E, vi (cJ + b) e, To a single impulse in the decay; ucti from the state t -yr of the first switch of the first switch or to the input T) of the first trigger lt :. to the input a of the second switch and, depending on the state of the 6 input of the second switch, either to the input D of the second trigger, to the input O of the third switch, and so on. In this case, it postulates the input D of the second trigger 6 of the shift register. With pr-, odom w synchrothetezer 4 of the first clock pulse in the reshstr 5 shift shears plOOOi code This is the position code of the first sign point in the c-rock. This code is converted by the position code into parallel converter 9 and is fed to the input of adder 1 along the X coordinate, where it is summed with the address code. At the output of the adders 1 on the X coordinate and 2 on the Y coordinate, the X, Y code of the first character point in the line is generated. The photo emitter of 8 light pulses produces a light pulse (writing to the matrix memory) of this point. The highlight (recording) is effected by clock pulses that either pass the output of the element AND 12 of the driver 8 of the light pulses to Hia, or are forbidden by the 11 O decoder if all triggers of register 5 have O recorded after the first clock cycle ends a single start of the line. Thus, on the D input of the second trigger, O is set, and 1 from the output of the second trigger arrives at the b input of the third switch. Since the state of the input of the third switch 0, go 1 goes to the C1 input of the fourth xmugator. The € -input state of the fourth switch 1, therefore, 1 is fed to the Ъ input of the fourth trigger by the arrival of an incoming clock pulse, the register LLC1O is written to the register. This is the second position code. sign. TfiK as in the position code of the sign of this line is no longer 1, then as soon as the output of the fourth flip-flop 6 of the shift register 5 is given by I, it appears at the c-output of the fifth switch 7 and through the element OR H is fed to the input synchro row strings 4. By the arrival of the S th clock: - impulse t T) - in the flip-flop triggers 6 of the shift register. ° lZ way, the third clock pulse in the shift register 5 is written down the code of the LLC. The decoder 11 O prohibits the passage of gaktovog. pulse on entry. element 12 and shaper 8 light pulses. The establishment of the fourth trigger 6 O forms the falling edge of the pulse at the output of the OR element, which is followed by the character string code in synchrozagore 4. The new code line of the character is fed to the input of the adder 2 to the Y coordinate, where it is summed with the address code, and to the input of block 3, which gives the position code of the character corresponding to this line. The inputs a, b of the first switch 7 receives a single pulse of the beginning of the line. If the line is empty, then at the P inputs of the switches 7, an O and a single impulse through the p outputs of all the switches 7 and the OR 10 element will pass to the input of the synchronizer 4 line counters and the falling edge will cause the sign string code to change. After all the lines are miscalculated, the synchro mark character: the key 4 gives a signal of readiness to receive a new code of the mark. Thus, it takes C + 1) cycles to interrogate one character line, where AND is the number of points in the anak line. If the string is empty (AND), then 1 clock is spent on it. This tick is not highlighted (not recorded in the matrix memory), since the highlight (recording) is disabled by the descriptor 11 A. Consequently, the writing time of the sign is reduced. This is especially significant with large matrix formats. For example, to form a special symbol matripe of 13 13 points in the proposed :: device, 38 cycles will be required, and in the known 169F o rm u et l of 1, the character generator, which contains the sum of the X and Y coordinates, is one of the inputs of which are connected: with the buses of the signals of the address code by the coordinates X and Y, the outputs with the buses of the signal codes of the coordinates X and Y, the block of memory, one of the inputs of which is connected to the bus of the signals of the character code, the other input to the first output synchronizer and another input of the adder on the Y coordinate, and the Tal position rerailer th code in parallel, whose input is connected to one input of po.tssveta signals. output - with another input of the adder on the X coordinate, the second output of the sync controller is connected to another vertex of the backlight signaling device, which is connected to the generator, it has a shift register, the first whose input is connected to the second output of the -cwixptv nvzator, the second input to the third Bbixo.v synchronizer house, the third input to the memory unit, one of the outputs of the shift register is connected to one of the inputs of the illuminator, the other output of the synchronizer. , 2. The generator of claim 1, wherein the shift register contains triggers, serially connected switches and an OR element, one of the trigger inputs is the first register input, the first and second inputs of the first switch are the second register input, and the third inputs of switches - the third, register input, other switch outputs are connected to other trigger inputs, the outputs of which are one of the register outputs, the output of the last trigger is connected to another input of the OR element, the output of which is the other output of the re gistra. Sources of information received during examination 1. Television methods and information display devices. Ed. Krivoshcheev. Soviet Radio, 1975; with. 75. 2. M Soyedov I. G., Sokolov A. F. Mapping in (} Yurmashga. Voenizdat, 1975, p. 59 ..

Claims (2)

Claim 1. A character generator containing summators along the X and Y coordinates ₍ one of the inputs of which is connected to the signal code bus lines at the coordinates Chi Y, the outputs are connected to the bus, signal codes 30 along the X and Y coordinates, memory unit, one / the inputs of which are connected to the signal code signal bus, the other input - to the first output of the synchronizer and the other input of the adder along the coordinate Y, transformed the Positioner code into parallel, the input of which is connected to one of the inputs of the backlight signal generator, the output - to the other adder input along the coordinate X, sec The first synchronizer output is connected to another input of the backlight driver, so that in order to increase the generator speed, a shift register is introduced into it, the first input of which is connected to the second output of the synchronizer, the second input - with the third output is the synchronizer house, the third input is with the output of the memory unit, one of the outputs of the shift register is connected to one of the inputs of the backlight driver, and the other output is to the input of the synchronizer. 2. Generator pop. 1, with the fact that the shift register contains triggers, series-connected switches and an OR element, one of the inputs of the triggers is the first input of the register, the first and second inputs of the first switch are the second input of the register, the third inputs of the switches are the third, the input of the register, the other outputs of the switches are connected to other inputs of the triggers, the outputs of which are one of the outputs of the register, the output of the last trigger is connected to another input of the OR element, the output of which is another output of the register.