SU959210A1 - Method of producing permanent lead time - Google Patents

Description

(54) METHOD FOR OBTAINING A CONSTANT TIME OF THE LEADING TIME

one

This invention relates to the automatic switching on of synchronous generators for parallel operation.

A known method of obtaining a constant advance time by fixing the coincidence moments of synchronized voltages in phase 1.

However, in this method, the synchronized voltages are pre-shifted in phase by an angle proportional to the slip frequency. This complicates the circuit implementation of the methods, especially if they are used in synchronizers designed to work with slow-acting generator switches at high (up to 3 Hz) slip frequencies, when the phase shift must also be large.

The closest to the technical essence of the invention is a method for obtaining a pitch of one hundred times the lead time, according to which, in the transition about beating, the beat voltage across the zero fixes the coincidence of the synchronized voltages in phase, breaking the voltage value

equal to the speMeim switch-on switch, compare this voltage with the maximum beat voltage and if these stresses are equal after passing the beat beat voltage through an extremum; fix a constant advance time of 21 "

The disadvantages of the prototype are the low accuracy of obtaining a constant time due to the almost always occurring pulsations and restraints;

10 beats, and the complexity of the circuit implementation due to the difficulties of implementing a device that is able to remember and store: voltage without distortion.

ts

The purpose of the invention is to improve accuracy and simplify the acquisition of a constant lead time. .

Claims (2)

The goal is achieved by the fact that when the first coincidence of the synchronized voltages is fixed in phase, after a time equal to the time of the switch on the switch, the second phase coincides with the time after which the 395 elapsed time is fixed. . FIG. Figure 1 shows a diagram of the device by which the proposed method is implemented; in fig. 2 - temporary daagrams, explaining the essence of the invention. The device contains a block of 1 fixed coincidence of synchronized voltages. But phase, counting trggers 2 and 3, integrator 4, comparator 5, trigger 6 with separate control over inputs, logic elements AND 7-9, integrator 10, zero authority 11, logic element I 12 , the zero setting signal 13, the signal 14 to the device setup change according to the advance time, the output signal. 15 devices. The timing numbers of FIG. 2. Correspond to the block numbers in FIG. 1. The device operates as follows. In the initial position, the triggers 2, 3 and B are in the state O, the integrators 4 and 10 are also reset to the zero state. The coincidence of the synchronized voltages Uc and Ujjio to the phase causes the appearance of the first pulse at the output of block 1 of coincidence fixation (time tj) .3TOT pulse triggers trigger 2 to the state, as a result of which integrator 4 starts counting time, and element And, 9 is preparing for operation, an increase in voltage at the output of the categorizer 4 to the voltage of the setpoint Q, which you & 1 is proportional to the required advance time; tuf, -lLv causes the comparator 5 to operate (moment tj), the pulse from the output of which is transferred to state 1, trigger 11 You The trigger voltage b prevents the operation of the element And 9 and detonates the operation of the elements 7 and 8. Since the high potential of the zero output of the trigger 3 is applied to the other input of the element 8, it opens, including the integrator 10 through the output voltage increase channel a plus. The arrival of the second pulse from the output of block 1 (the moment of time (1e) causes the flip-flop of flip-flop 2 to state b, and flip-flop 3 - to state 1. Element And 8 is locked, element And 7 is unlocked, turning on the integrator 10 via the output voltage decreasing channel minus. The voltage at its output begins to decrease. Decreasing the voltage to zero (time t4) triggers the zero-organ triggering 11, the signal from the output of which AND 12 element prepared by trigger 3 for operation, and the appearance of the output signal 15. Element And 9 provides a reset of all yci of the device One situation, if the frequency difference is large, that the period of beats is less than the switch on time. The device, and hence the method, can be built on any element base containing pulse shapers, triggers, elements, And, comparison circuits, integrators with differential inputs. The accuracy of obtaining a constant advance time for the proposed method does not depend on the ratio of the amplitudes of synchronized voltages, nor on the quality of the filtration of the beat voltage, which is advantageous distinguishes the proposed method of prototshy. G, Formula of the invention. A method of obtaining a constant advance time by fixing the moments of the same synchronized voltages in phase, of a phase, and so that, in order to improve the accuracy and simplify the obtaining of a constant advance time, after fixing the first match The synchronized phase voltages one time later, equal to the switch response time, count up the time to the second phase coincidence, after which, after the time elapsed, the constant leading time is recorded. Sources of information taken into account in the examination 1. The author's certificate of the USSR N 454634, cl. H 02 J 3/40, 1971. 2. USSR author's certificate number 604081, cl. H 02 J 3/42, 1970. i S / IN LMM ty . i "Nl Vt (i 5t l four ..  t