SU951638A2 - Frequency multiplier - Google Patents

Description

(5+) MULTIPLE FREQUENCY

one

The invention relates to computing and can be used as a network frequency multiplier for devices with direct connection to the network, as well as for controlling the digital start-up bodies of relay protection of objects of electrical stations or electrical circuits.

According to the main auth. No. 860275, known frequency multiplier, containing a phase shifter, the output of which is connected to the first inputs of the adder and subtractor, and the input is connected to their second inputs, five comparators, the outputs of which are connected to the corresponding inputs of the element OR, the first input of the first comparator is connected to the first the input of the second comparator, the second input of the first comparator is connected to the first input of the third comparator, and the first input of the fourth comparator is connected to the first input of the fifth comparator, between the output of the phase shifter and the second the first rectifier is turned on by the first comparator, the second rectifier is switched on between the output of the adder and the first input of the first comparator, the third rectifier is turned on between the output of the subtractor and the first input of the fourth comparator

, Q and between the output of the phase shifter and the second input of the second comparator is included the fourth rectifier, while the second inputs of the second, third and fourth comparators are connected between

5 and the first input of the third comparator is connected to the second input of the fifth comparator j.

However, the known frequency multiplier has an insufficiently high multiplication factor.

Claims (1)

The purpose of the invention is to increase the multiplication factor. 39 To achieve the goal of a frequency multiplier, containing a phase shifter, the output of which is connected to the first input of the adder and subtractor, and the input is connected to their second inputs, five comparators, the outputs of which are connected to the corresponding inputs of the OR element, and the first input of the first comparator connected to the first input of the second comparator, the second input of the first comparator is connected to the first input of the third comparator, and the first input of the fourth comparator is connected to the first input of the fifth comparator, between the output of the phase shifter and w The first rectifier is switched on by the input of the first comparator, the second rectifier is switched on between the output of the adder and the first input of the first comparator, the third rectifier is switched on between the output of the subtractor and the first input of the fourth comparator, and the fourth rectifier is switched on between the output of the phase shifter and the second input of the second comparator while the second inputs of the second, third and fourth comparators are interconnected, and the first input of the third comparator is connected to the second input of the fifth comparator, between the output of each rectifier One of the four additional comparators that were entered, the second inputs of which are interconnected, and the series-connected amplitude detector and voltage divider are inserted between the phase shifter input and the connection point of the second inputs of the additional comparators. FIG. 1 shows a structural electrical circuit of the proposed frequency knob intelligence; FIG. 2 - time diagrams of his work. The frequency multiplier contains a phase shifter 1, an adder 2, a subtractor 3, an amplitude detector, a voltage divider 5, rectifiers 6–9, comparators 10–18, an OR 19 element. The frequency multiplier works as follows. Phaser 1 converts a sine wave to a cosine wave, adder 2 adds a sine wave and a cosine wave, subtractor 3 subtracts the cosine wave from the sine wave, the amplitude detector k generates a constant signal equal to the modulus of the input signal, which, using a voltage divider, reduces the voltage to become equal to the absolute value of the amplitude of the input signal, which is equal to the amplitude of the voltage, which is equal to the amplitude of the input signal. 25 °. Thus, a group of five signals is obtained (see Fig. 2a. The input signal and the signals from the outputs of the phase shifter 1, the adder 2, the subtractor 3 are rectified by rectifiers 6-9 (see Fig. 26). The signals from the outputs rectifiers 6-9 and the signal from the output of the voltage divider 5 are supplied in pairs to the comparators 10-18, which form narrow pulses at the moment of equality of the supplied signals at their inputs (see Fig. 2c, d, g, g, k , lm, n). The signals from the outputs of the comparators 10-18 are fed to the inputs of the element OR 19, from the output of which the signal is taken in the form of narrow pulses with a frequency of 32 times and more than the frequency of the input signal (see Fig. 2p). The use of the proposed invention in comparison with the known one allows the multiplication factor to be doubled. Formula of the invention The frequency multiplier according to author No. 860275, characterized in that multiply, between the output of each of the rectifiers and the corresponding additional input of the OR element, one of the four additional comparators introduced is included, the second inputs of which are interconnected, and between the input of the phase shifter and the second connection point additional comparator's inputs entered consecutively connected amplitude detector and a voltage divider. Information sources. taken into account during the examination 1. USSR copyright certificate № 860275, cl. H 03 H 19/00, 1980 (prototype).  ug v u v g v CSI i , tV V 7 k at t i i 1 t 1 1 V i i i i I t / V / 7h 2}