SU902266A1 - Device for digital tracing of periodic signal phase - Google Patents

Description

(S) DEVICE OF DIGITAL SUPPORT OF PHASE OF A PERIODIC SIGNAL

one

The invention relates to electronics and can be used in phase meters, regulating and controlling devices of electrical and radio systems for obtaining information about the instantaneous current value of the periodic signal phase.

A device for measuring instantaneous values of periodically repeating processes, performed on an electron tube, the circuit in the grid of which includes a pulsed device, such as a neon lamp, fed through a phase shifter with alternating current of a frequency equal to the frequency of the process under study is known. In this device, the task of the moment. measurements, i.e. The formation of information about the current phase of the process being studied is carried out using the time of the driver circuit collected on a capacitor and a neon lamp. The start of this thread is synchronized.

, With measurable periodic process.

The use of electronic timing chains to form information about the current phase of the batch process provides a high speed of the device and expands its range of use 11 and W.

The disadvantage of such a device is an increase in the error in the formation of the tracking signal when the frequency of the studied periodic process deviates from the fundamental frequency, to which the timing chains are tuned.

It is also known to provide a digital tracking of a periodic signal phase, comprising a series-connected pulse generator, a pulse sequence adder and a pulse counter, the output of which is the output of the device, as well as a zero detector

periodic signal, the input of which is the input of the device, and the output is connected to the input of the installation of the pulse counter 33.

However, the known device does not provide sufficient speed and accuracy of digital tracking when changing the frequency of a periodic process.

The purpose of the invention is to increase speed and accuracy.

To do this, a known device for digital tracking of a periodic signal containing a series-connected pulse generator, a pulse sequence adder and a pulse counter whose output is the device output, as well as a periodic signal detector whose input is the device input and the output connected To the input of the pulse counter installation, a serially connected pulse counter, a memory register and a parallel accumulator are entered, the output being the periodic signal detector is connected to the control input of the memory register and to the installation input of the measuring pulse counter, the counting input of which is connected to the output of the pulse generator, the output of the parallel accumulator adder is connected to another input of the adder of the pulse sequences, the output of which is connected to the input of the gating of the parallel adder -kopitel.

The drawing shows a diagram of the proposed device.

The device for digital tracking of the periodic signal phase contains a pulse generator 1, a pulse sequence adder 2, a pulse measuring counter 3, a periodic signal zero detector, a pulse counter 5, a 6-memory register, a parallel accumulator 7, input 8 and output 9.

The device works as follows.

The input 8 receives a periodic signal with a period T, the Detector 4 zeros of the periodic signal when the signal passes through zero from - to + generates a pulse, by which the contents of the measuring counter 3 pulses are recorded in memory register 6, and then the measuring counter 3 pulses and counter 5 pulses set to the initial, in this case, in the zero position.

Thus, at this moment, the contents of the counter 5 pulses correspond to the zero value of the phase of the periodic signal.

The pulse generator 1 generates a pulse sequence with a frequency F chosen based on the pulse width of the pulse counter 3 and the permissible deviation of the period of the output signal T so that when

the maximum period of the measuring counter 3 pulses was not crowded. In the intervals between the pulses of the installation, the pulse counter 3 is advanced by the frequency F.

Thus, for the period T of the input signal, the pulse counter 3 receives the PxT pulses.

In register 6 of memory, the number from the counter of 3 pulses is written

in reverse code

(one)

AS S - FxT

where S is the capacity of the counter 3.

Pulses of frequency F from the output of the generator 1 pulses arrive at the first input of the adder 2 pulse sequences and then to the counting input of the counter 5 pulses

and the gate input of the parallel accumulator-accumulator 7. Simultaneously, the parallel input of the parallel accumulator-accumulator 7, the capacity of which is equal to the capacity of the counter of 3 pulses, is supplied from the register 6 of the memory & Consequently, with each frequency pulse F, the value of the accumulated sum in the parallel accumulator 7 increases over 5. With continuous gating, the parallel accumulator-accumulator 7 overflows, at its output, the transfer from the highest bit is generated

pulse, the fill cycle is resumed. Impul1; from the transfer from the output of the parallel accumulator-adder 7 is fed to the second input of the adder 2 pulse sequences

Claims (3)

and then simultaneously at the counting input of the pulse counter 5 and the gate input of the parallel / ibHOro accumulator 7. Thus, at the moment of overflow of the parallel adder-macro 7, the initial sum is entered into it, equal to AS, which is the initial one during the subsequent cycle of its filling . If there is a residual in the parallel accumulator 7 at the time of the formation of the overflow pulse, the initial value is the sum of the residual and L5. B. Further, to simplify the understanding of the operation of the circuit, the description is given without taking into account the remainder. The number of pulses gating parallel accumulator-accumulator 7 in the next accumulation cycle is equal to e1, where ent is an integral part of the expression,. standing in brackets; S-AS is the capacity of accumulator 7 after the introduction of the initial number D5. The filling period of the parallel accumulator 7 is equal to (1) The total number of overflow cycles of the parallel accumulator 7 for the period of the input signal T Thus, the second input of the sump 2 pulse sequences and then the counting input of the counter 5 pulses During the period of the followed signal T, AS receives additional pulses, which is equal to the magnitude of the error in the measuring counter of 3 pulses. The total number of pulses received at the counting input of the counter 5 pulses during the period T is equal to the input signal NSS (6 And does not depend on the magnitude of this period and frequency at a steady frequency of the input signal. Thus, at the output 9 of the device, a digital sweep is formed the number of discretes during the period of the input signal, i.e. synchronized with the beginning and end of this period. The instantaneous values of this sweep correspond to the current phase values of the input signal with an error not exceeding one Discretions of the pulse counter 3. In addition, the proposed device provides the maximum speed, which is determined only by the parameters of the element base.A invention The device for digital tracking of the periodic signal phase, containing series-connected pulse generator, pulse sequence adder and pulse counter, the output of which is output the device, as well as the detector of the zeros of a periodic signal, whose input is the input of the device and the output connected to the input y impulse counter, characterized by the fact that, in order to improve speed and accuracy, serially connected impulse counter, memory register and parallel accumulator accumulator are inputted to it, while the output of the periodic signal zero detector is connected to the control input of the memory register and to the input of the installation of the measuring pulse counter, the counting input of which is connected to the output of the pulse generator, the output of the parallel accumulator adder is connected to another INPUT of the adder pulse by sequences, the output of which is connected to the gate input of the parallel accumulator accumulator. Sources of information taken into account in the examination 1.Certificate of certificate number 11083, cl. 6 01 R 19 / 0i “, 193. 2. Digital electrical measuring instruments. Ed. V.N. Shl ndina. M., Energie, 1972, p. 92-12Jt, fig. 3.21. 3. Buhviner V.E. Discrete circuits in phase radio communication systems. M., Holy Hour, 1969, p. 2, Fig. 1.11 (prototype). . Bxoff l g P W / ifoff