SU900204A1 - Device for measuring time intervals - Google Patents

Description

one

The invention relates to a measuring technique and can be used mainly in digital electronic measuring devices.

A device for measuring time intervals is known, comprising pulse counters, a clock generator and logic elements tH

However, the device has low speed and low measurement accuracy.

The closest to the proposed technical essence and the achieved result is a device for measuring time intervals, which contains a clock frequency generator, the first and second summing pulse counters and the AND-NOT matching element, whose inputs are connected to the first inputs of the first and second pulse counters. In addition, this device contains a block

information output, switching unit and trigger t2.

A disadvantage of this device is the inability to increase the allowable count rate above the switch speed of the low-order trigger trigger that determines the maximum speed of the counter. The counting rate is limited to the use of the same type.

10 elements that have the same speed as the device itself. The information in the counters information is conducted through additional elements, such as shift registers.

15 In this case, the information is displayed once, which can lead to the loss of private information in other blocks, and this leads to a decrease in the reliability of the measurement of the time interval.

The purpose of the invention is to improve the accuracy of measuring the time interval,

The goal is to reach a device for measuring time intervals; containing the clock frequency generator 5 the first and second pulse counters and the NAND match element, whose inputs are connected to the first inputs of the first and second pulse counters, the first, second, third, fourth, fifth, sixth, seventh cryotrony switch5 is introduced; the eighth, ninth, tenth, eleventh, and twelfth elements AND, the account management unit, the shift pulse generator unit, the zero setting unit, connected in series the third, fourth, fifth and atemporaneous pulse counters p connected in series the seventh, eighth; the ninth and tenth summing pulse counters and a series-connected adder and information block, the first output of the side control account is connected via a clock generator to the input of a cryotronic switch 5 of the two outputs of which is connected to the cooTBBTCTByTOtttHM input of the coincidence element AND-NOT, the output which is connected to the inputs of the installation unit zero and the control unit of the account, the second output of which is connected to the first inputs of each of the twelve elements AND through the block of the generator of shift pulses, the first input is first The summing pulse counter is connected to the second input of the third summing pulse counter, the second input of the first element I is connected to the first output of the first summing pulse counter, the second output of the first summing pulse counter is connected to the BTopbEvi input of the second element I, the output of the zero setting unit is connected to the second inputs of the first , second, fourth, sixth, eighth and tenth summing pulse counters and to the outputs of the second, third, fourth and fifth elements And, the output of the first element And with One third terminal of the fourth pulse with a pulse counter, the first input of which is connected to the second input of the fifth summing pulse from the receiver, the first output of the fourth summing pulse counter is connected to the second input

the sixth element And, the output of which is connected to the third input of the sixth su of the pulse counter, the second output of the fourth summing counter. pulses are connected to the second input of the third a-rc element And, the first output of the sixth csrMMHpyreniero

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A pulse net is connected to the second input of the seventh element I, the output of which is connected to the second input of the first summing impulse counter, the second output of the sixth summing impulse counter is connected to the 0 pin. the input of the eighth terminal I, whose output is connected to the third input of the first summing pulse counter, to the input of the adder, to the output of the ninth element And and to the third input of the second summing pulse counter, the first input of which is connected to the second input of the seventh summing pulse counter, the first output of the second The summing pulse counter is connected to the second input of the tenth element Element I, the output of which is connected to the third input of the eighth summing pulse counter, the second output of the second summing counter 1 pulses connected to the second input of the fourth element And the first input of the eighth summing pulse counter is connected to the second input of the ninth total of the pulse counter, the first output of the eighth summing pulse counter is connected to the second input of the eleventh element H, the output of which is connected to the third input of the tenth sum pulse counter, the second output of the eighth summing pulse counter is connected to the second input of the fifth element, And, the first output of the tenth summing pulse counter under for prison to a second input of a ninth AND gate, the second: outlet tenth summing pulse counter is connected to the second input of the twelfth element H, the output of which is connected to the second input of the second summing pulse counter.

FIG. 1 shows a functional diagram of the device for time intervals; in fig. 2 - time diagram of his work.

Claims (2)

1. USSR author's certificate No. 610306, cl. H 03 K 21/34, 03/29/76, 2. Authors' certificates of the USSR No. 708253, cl. G 01 R 23 / 00,01.04.76 (prototype). /five