SU894702A2 - Device for discriminating extremum number - Google Patents

Description

(54) DEVICE FOR ISOLATION OF EXTREME NUMBER

The invention relates to computing technology and can be used when organizing a computational process for processing a task package of a multiprocessor or multi-machine computing system. According to the main author, No. 658558, a device is known that contains OR-NOT elements, bitwise transfer units, AND and OR f1 element groups. However, the known device cannot be used to distribute tasks to processors in a multiprocessor computing system. The purpose of the invention is to expand the field of application of the device. The goal is achieved by the fact that the first and second groups of n triggers, groups of () elements AND (where n is the number of tasks in the package; m is the number of bits in the task weight codes) are entered into the device for extracting an extreme number (m) p-2) additional elements OR, a group of IZ (p-1) elements OR NOT, the first inputs of which are connected to the first outputs of the first group triggers, except the output of the first trigger of the first group, the second outputs of which are connected to the first inputs of the corresponding additional elements OR , i-th (i 2, p-1) additional elements Commerce OR is connected to the second inputs (1-1) of the OR-NOT elements, the group, the outputs of the second group triggers are connected to the first inputs of the corresponding AND elements, the group of inputs of the second group triggers is the group of installation inputs of the device, the single inputs of the first group triggers connected to the outputs of the elements AND groups of the last-bit transfer node, the zero inputs of these flip-flops are connected to the device reset input, the first inputs of the elements AND group are the group of code inputs of the device, the outputs of the elements OR NOT groups and

The first trigger of the first group is a group of device outputs, the outputs of the second group of flip-flops are connected to the second inputs of the AND elements of the second group, the output of each T-th element AND group is connected to the corresponding input of the first output element OR NOT,

The drawing shows the proposed device, the structural scheme

The device contains, according to the number of tasks solved in the package, the triggers 1 of the second group, the group of elements AND 2, the output elements OR-NOT 3.3 l ... 3-bit transfer units 4.42,., A, the group of elements AND or OR 5, consisting of the elements OR b and elements And 7, triggers 8, Z.,. 8 of the first group, additional elements OR 9 92- 9y ,, elements OR — NOT groups 10,10,., ... 10, group of code inputs 11

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devices, installation inputs 12 ,, 12,. ,,,,. 12 devices, group of outputs 13. (, 13 ,, .., 13 devices, device reset input 14,

The device works as follows.

At the inputs 11 of the device, t-bit codes of n numbers are received, and at the installation inputs 12, as problems are solved, single signals are received, signs of problem solving, which transfer the corresponding triggers 1 to a single state, thereby ensuring that the delivery of codes of numbers through the And 2 elements stops groups to the inputs of the first bitwise transfer node and to the inputs of the element OR NOT

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In the initial state, all the triggers 1 are in the zero state, and their zero outputs are connected to the inputs of the And 2 group elements.

At the first moment, the higher bits of the number codes are analyzed. If at least one of the higher bits of the codes is 1, then at the output of the element 3j (O is formed. If this is the highest bit of the i-th number (, n) is O, then all the digits of the i -th number do not pass through elements AND 7 of the i-th group of the first bit node 4 If the highest bit of the i-number is 1, then the bits of the i-number of the number pass through the elements And 7 of the i-th group of the first bit transfer node.

If the highest bits of all codes of numbers are zero, then at the output of the OR-NOT 3 element, 1 is generated, which gives permission to pass all n codes of numbers through the AND 7 elements of the first bit transfer node.

If the highest bits of all codes of numbers are zero, then at the output of the OR-NOT 3 element, 1 is generated, which gives permission to pass all n codes of numbers through the AND 7 elements of the first bit transfer node. At the exit of the elements And 7 groups

elements 5, direct codes of numbers are formed, starting from the second to the t-th digit. The second element OR-NOT 3 together with the elements of OR 6 of the random transfer node analyzes the second-ranking bits of n numbers in the same way as the higher bits. At the output of the element ILINE 3, the second most significant digit of the extreme number is formed, and

At the outputs of the elements And 7 - codes of numbers, starting from the third to the t-th category, etc.

Thus, the code of the extremum number is obtained by coinciding all ha of the inhibit signals generated in each bitwise transfer unit 4. When the inhibit signals are 1, one or more outputs of the And 7 elements of the last bitwise transfer unit 4 forms the code with 1 in the bits corresponding to the extreme codes of numbers (in the problem package being solved there may be tasks requiring the same time

to solve)

Claims (1)

The appearance of single signals at the outputs of the Elements And 7 of the last bit transfer unit 4. causes the transfer of the corresponding triggers 8 to a single state. With a simultaneous single state of several triggers 8, at the output of the device, a single signal is output in only one output bus i, and, where, n and, n, i. preference is given to the task, the sequence number of which is the greatest among the tasks with the same required solution time. This is achieved by the fact that a high potential from the output of the trigger 8, corresponding to the problem being solved, with the highest order number is fed through 5 elements OR 9 to the first inputs of the previous ones elements OR-NOT 10, the second inputs of which are connected to the double-named zero outputs of the triggers 8. Thus, the position code of the number of the extremal number is obtained at the outputs 13 of the device. When assigning the next i-th task of the packet, a single signal is sent to the corresponding trigger-1, resulting in the termination of the i-th number code from the outputs of the AND 2 group elements for further comparison, as well as to the input H of the device, with the result that the triggers 8 are transferred to zero, the state and operation of the device according to the choice of the next task from the packet occurs in a similar way. The application of the invention allows to expand the field of application of the device. Claims of the invention A device for allocating an extremum number according to the author. No. 658558, characterized in that, in order to expand the field of application of the device, it contains the first second groups of n flip-flops, groups of (n-Hn) AND elements (where n is the number of tasks in the package; m is the number of bits in the codes task weights), (nZ) additional elements OR, a group of 2, (p-1) OR-NOT elements, the first inputs of which are connected to the first outputs of the first group triggers except the output of the first trigger of the first group, the second outputs of which are connected to the first inputs of the corresponding additional elements OR, outputs of the i-th (, n-1) additional elements Commerce OR is connected to the second inputs of (1-1) -th elements of the OR-NOT group, the outputs of the second group triggers are connected to the first inputs of the corresponding elements AND group, the group of inputs of the second group triggers is a group of device setup inputs, the single inputs of the first group triggers with the outputs of the elements AND groups of the last bit transfer node, the zero inputs of these flip-flops are connected to the device reset input, the first inputs of the elements AND group are the group of code inputs of the device, the outputs of the elements OR NOT the group and the first trigger of the first group are a group of device outputs, the outputs of the second group of flip-flops are connected to the second inputs of the AND elements of the group, the output of each t-th element of the AND group is connected to the corresponding input of the first output element OR NOT. . Sources of information taken into account in the examination 1. USSR Copyright Certificate № 658558, cl. G About F 7/02, 1976 I I fm-i r I m mm I I jj ra Lijt t / 5rf u ur / tf, / Ji T rj /