SU894699A1 - Binary-to binary coded decimal code converter - Google Patents

Description

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The invention relates to computing and can be used in the construction of converters of mixed binary code into binary-decimal code.

A known converter of binary code of mixed numbers into a binary-decimal code comprising a control unit, a signal generation unit, an equivalent switch, a storage unit, an adder, a calculator, a shifter, input information, output information and control bus l.

The disadvantage of this converter is low speed, which depends on the number of bits of the decimal code.

The closest to the present invention is a binary-to-binary converter that contains a block of converting whole binary numbers to binary-decimal, built on the basis of binary adders and correction blocks.

A disadvantage of the known device is that it is not possible to convert fractional binary numbers to binary digits,

The purpose of the invention is the expansion

5 functionality by converting both integers and fractional.

The goal is achieved by the fact that a correction code storage block, an adder and a switch are entered into the binary-to-binary-to-binary converter, containing the unit for converting whole binary numbers to binary-to-decimal

f5, the first group of inputs of which is connected to the outputs of the adder, the second group of inputs is connected to the first group of inputs of the adder, to the information inputs of the converter,

20 wherein the higher bits of the second group of inputs of the switch are connected to the inputs of the storage unit of the correction correction codes, the group of outputs of which is connected to the second

25 by a group of inputs of the adder, the outputs of the switch are connected to the inputs of the block for converting whole binary numbers to decimal, the outputs of which are informational outputs of the converter.

The drawing shows the block diagram of the device.

The information input 1 of the converter is connected to the input of the permanent storage device 2 of the correction, to the first input of the adder 3 and to the first input of the switch 4, the second input of which is connected to the output of the adder 3. The second input of the adder 3 is connected to the output of the block 2. storing corrective codes. The output of the switch 4 is connected to the input of the block 5 for the conversion of whole binary numbers to binary-decimal, the output of which is connected to the information outputs b of the conversion.

The conversion of a fractional duplicate code to binary-decimal is performed using a series of decimal numbers.

2 2 2 2 jooo yooo 1OOO -food whose members are approximately equal to the members of the converted row of 2- J 2-) 3- .. numbers. Consequently, the bit weights of the converted binary fraction can be replaced with the corresponding weights of the bits of the integer binary number 2 ; 2®; 2 ... 2. The error resulting from replacing a number of binary fractions with a whole binary number can be corrected. When correcting the code, the input code is analyzed, since the amount of correction depends on the value of this code.

The table shows the necessary correction.

How. can be seen from the table, for a given accuracy it is necessary to analyze the state of only the neck of the most significant bits of the input code / since the error does not exceed half of the least significant bit of the input code. In this case, the correction code should have only five bits. To form a correction code when converting a ten-bit code, you can use a permanent storage device with six inputs and five outputs.

The Converter operates as follows.

Convertible binary code is fed to input information input 1. When converting integers, switch 4 connects the input of block 5 to the conversion of integer numbers to information input 1, and the code to be converted is fed to the input of conversion block 5. From the output of block 5 for the conversion of integers, the binary-decimal code enters the information one, the output of the converter.

 When converting a fractional binary code, switch 4 connects the input of an integer conversion unit 5 to the type of adder 3. The fractional binary code being converted is fed to information input 1, from the output of which the code goes to the first input of the adder 3, and the six most significant bits of the code This memory device 2 correction, in which the code correction code. The correction code corresponding to the input code from the output of the permanent storage device 2 is fed to the second input of the adder 3,

From the output of the adder 3, the corrected code is fed through the switch 4 to the block 5 for converting integers, the output of which is the binary-decimal code arriving at the digital output 6 for the conversion.

The proposed converter can be used to convert binary multi-bit integers as well as fractional numbers to binary-binary ones.

Claims (2)

In addition, by increasing the bit widths of the input and output informational slots and the size of the conversion unit and re-switching of the bit buses, the proposed converter can be used to process the mixed codes. DETAILED DESCRIPTION OF THE INVENTION Binary code to binary-decimal converter containing & LOC converting whole binary numbers to binary-decimal, which is characterized by the fact that, in order to extend the functionality by converting whole and fractional numbers, into it the correction code storage unit, the adder and the switch are entered; the first group of inputs is connected to the outputs of the adder; the second group of inputs is connected to the first. Group of inputs of the adder, c. the information inputs of the LNA transducer: the higher bits of the second group of inputs of the switch are connected to the inputs of the correction correction storage unit, the output group of which is connected to the second group of adder inputs, the switch outputs are connected to the inputs of the binary whole numbers conversion block, the outputs of which information outputs of the converter, Sources of information taken into account in examination 1, USSR Copyright Certificate 577524, cl. G About F 5/02, 1976. 2. Bitner X. Binary code converter in binary-decimal to K / MOS IC. - Electronics, 1979, vol. 52, No. 10, p. 67-68, Figure 1 (prototype).