SU877549A1 - System for data processing with checking - Google Patents

Description

(54) SYSTEM FOR PROCESSING INFORMATION WITH CONTROL

The invention relates to computing technology, information processing, and can be used to detect failures in systems operating with real-time devices. Known devices dp control channels input digital computers. These devices make it possible to detect faulty situations, and the known devices work in autonomous modes and, with a good ability to detect errors in information systems, do not allow them to be used in systems where it is necessary to carry out operational processing of information at the rate of its arrival. Cl2 processing of information, the detection of failures in information systems and their automatic correction is a necessary condition for the normal operation of information processing systems in real time. The closest in technical essence is a device for controlling the passage of pulses, having a single pulse generator, which is triggered by a button on the remote control of the device and generates a single pulse. This pulse, the passage through the valve block, the delay block, the switching block, and the test block, is returned to the valve block, a circular with frequencies determined by the delay period generated by the delay block. A single failure in the test unit, the circulation in the ring circuit is stopped, and the display unit shows the absence of a G21 pulse. The disadvantage of the device is that it works only in manual mode and does not allow automatic recovery of clock signals and cannot be used for operation in real conditions. The purpose of the invention is to increase speed. The goal is achieved by the fact that a system for processing information with a control, containing an electronic computing machine, an external device batch, an OR group of elements, a delay unit, the output of the delay unit connected to the output request of the Electronic computer and to the input of the external device block, the first output of which is connected to the first input of the group of elements OR, the output of which is connected to the restoration input of the electronic computer, the output of interruptions of which is connected to the second output of the external unit these devices are entered in the memory block. The trigger, the OR elements, and the AND element, with the delay of the pod delay block, the keys to the first input of the trigger and the AND element, the output of which is connected to the input of the memory block, the output of which is connected to the first element at the input of the OR element, - the output of which connected to the input of the word code of the electronic computer, the second, the input of the element OR is connected to the third output of the external device block, the first output of which is connected to the second trigger input, the third input which is connected to the output of the delay block, the trigger output connected to the second input ale cient I. In the drawing, a block diagram of the proposed device. The device includes a trigger 1, an AND 2 element, a delay unit 3, an OR unit 4, an OR element 5, a memory block 6, an electronic sensing machine 7, external devices 8. The system starts when an interrupt signal appears, as a result of a change in the internal state of external devices (as a result, an interrupt signal appears at the output of one of the external devices, which enters the input of the control system of electronic computers and computers; the actual interrupt signal appears during normal operation, A false interrupt signal appears as a result of a failure. When a valid or false interrupt signal arrives, a signal of the state word is sent to the input of the computer control system to the input of the external device, which simultaneously arrives at the input of the delay unit 3 and the second trigger input 1 of the control preparation Depending on the type of interrupt signal that triggered the output of the word query signal, the following signals can be generated from a digital computer (PC) by an external device. If the computer interruption was false, no signal was output from the device's external device, if the interruption was valid, then the output clock and the code of the state of the external device are output from the output of the external device. The clock pulse from the external device enters the second input of the 4-element OR block, from the output of which the clock-response pulse goes to the computer. In addition, the response clock is fed to the third input of trigger 1 and returns to its initial state, from the output of the trigger, to the second input. element 2 is supplied with a signal, the forbidden operation of element i. The code of the state word from an external device enters the second input of the element OR, from the output of which is fed into a computer. The computer analyzes the code of the status word and continues to work in accordance with the program instructions. In the absence of a response clock from the output of an external device, the first input of the And 2 element receives a request for a status word code with a delay of time determined by the delay unit 3. At the output of the AND 2 element, a recovered sync pulse is generated, which is fed to the first input of the OR block for subsequent output to the computer, as well as to the input of the memory block 6 to form the alarm code of the status word; which comes from the output of the memory block to the first input of the OR element and then to the computer, where, in accordance with the emergency code of the state word, an emergency program is started, carrying out, recording, analyzing, restoring the device and proceeding to further execution of the programmed . From the output of the delay block 3, the request sync signal arrives at the first input of the trigger 1 and returns it to the initial state. The use of the system allows to obtain a positive technical effect, since the system is included in the information processing system, it allows to fix, restore and automatically compensate for faulty clock pulses, ensuring the continuous operation of the system in real time. formula from a bbq. system and system for information processing with control, containing an electronic computing machine, a block of external devices, a group of elements OR, block, per 5, 877

support, while the output of the delay unit is connected to the output of the request of the electronic computer and to the input of the block of external devices, the first output of which is connected to the first input of a group of elements OR, the output of which is connected to the recovery input of the electronic computer, the output of the interruptions of which is connected to the second output block of external devices, characterized in that, in order to increase speed, a memory block, an OR element trigger and an AND element are entered into it, and the output of the delay block is connected to the first input igger and an element, the output of which is connected to the input of the memory unit whose output is connected to

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Code with / 1o $ and cdcmofiHtifl external devices / pen

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the first input of the OR element, the output of which is connected to the input of the word code of the electronic machine of the computing machine, the second input of the OR element is connected to the third output of the external device block, the first output of which is connected to the second trigger input, the third input of which is connected to the output of the delay block, the trigger output connected to the BTqpbiM input element I.

Sources of information taken into account in the examination

1. USSR author's certificate №415662, cl. Q 06 F 11/04, 1973.

2. USSR author's certificate No. 458787, cl. q 06 F 11/04, 1974 (prototype).

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About ttmSema

Claims (1)

Claim A system for processing information with control, containing an electronic computer, a block of external devices, a group of OR elements, a block, delays, while the output of the delay block is connected to the output '' request * of the electronic computer and to the input of the block of external devices, the first output of which connected to the first input of the OR group of elements, the output of which is connected to the input 'recovery * of the electronic computer; the interrupt output of which is connected to the second output of the block of external devices, characterized in that, in order to increase performance, a memory block, a trigger of an OR element, and an And element are introduced into it, while the output of the delay block is connected to the first input of the trigger and the And element, the output of which connected to the input of the memory unit, the output of which is connected to the first input of the OR element, the output of which is * connected to the input of the word code of the electronic computer, the second input of the OR element is connected to the third output of the block of external devices, the first the output of which is connected to the second input of the trigger, the third input of which is connected to the output of the delay unit, the output of the trigger is connected to the second input of the element I.