SU873353A1 - Pulse regulator of ac current power - Google Patents

Description

(54) PULSE AC POWER CONTROLLER

The invention relates to electrical engineering and is intended for use as a pulse power regulator in electrothermal installations connected to AC circuits. Known devices for pulse power control in alternating current circuits Наиболее The closest in technical solution to the present invention is a device for power control, containing, consequently, a clock generator synchronized by a network, a distributor, a multi-bit coincidence circuit, a circuit And a switch controlled by the gate and the load, the inputs of the circuit I are connected to the output of the multidisk coincidence circuit and the output of the clock generator, and the inputs of the multidisc circuit with drop of bottom discharge soed1sheny with respective passages rastfedelntel BL and the register, the inputs of which is supplied a binary signal driving; NILE. In the coincidence circuit of this device, control pulses are released, switching the controlled valve to a conducting state at the moment of equality to the network voltage supply during the mains voltage period, and the number of these pulses during the impulse control interval, the duration of which is determined by the largest capacitance the distributor and the register, equal to the discrete control signal recorded in the register as a binary number. At the same time, there is a power in the load, the average value of which is within the control interval for the piston-discrete control signal 21. The functionality of this device is small due to the fact that the use of a binary distributor and register in it in combination with a multi-bit coincidence circuit leads to the range of change of the basic parameters of the device — the duration of the pulse control interval; the frequency and discreteness of the control of the dampness. The duration of the pulse control interval can only take the values T, (2-1) Te 7To, 15T, / (,, and., V- - D T T W- control resolution - values 100, 33.3, 14.3,

6.6 J, etc. respectively, where () is the number of binary bits of the distributor and the register, and T is the length of the period of the network voltage.

Getting intermediate arbitrary

the values of the duration of the adjustment interval and the resolution adjustment when using this device is impossible.

The aim of the invention is to expand the functionality of the device, namely the achievement of the possibility of arbitrary values of the duration of the pulse control interval and the discreteness of the power control.

The goal is achieved by introducing two sulshators into the device, a multi-digit two-input comparator, the output of which is connected to the second input of the AND element, and the bits are connected to the corresponding outputs of two adders, one of which is connected to the register outputs by its information inputs, a clock input with the output of the sync pulse generator, and another adder with its information inputs connected to the tires of the adjustment interval setting, and a clock input with the output of the AND element, The inputs of the preset .register and cmmator are connected to the output of the sync pulse generator via a counter.

FIG. 1 is a block diagram of a pulse power control device; in fig. 2 - timing charts of the device.

The device contains synchronizer 2 synchronized by a network 1, sequentially connected to element 3 AND, a key 4, a controllable valve 5 and a load 6, and a multi-bit two-input comparator 7, the output of which is connected to the corresponding outputs of two accumulating adders 8 and 9. Adder 8 whether by their information inputs the bit is connected to the outputs of the register 10, the clock input is. with the output of the imaging unit 2, and the adder 9 with its information inputs is connected to the buses 11 of the adjustment interval setting and the clock input is connected with the output of the ZI element, with the inputs of the preset of the register 10 and the adders 8 and 9 connected to the output of the imaging generator 2 through the counter 12, and the information inputs the register 10 is connected to the control signal recording buses 13. The circuit works came down in a skinny way.

In the initial state, the adders 8 and 9 are in the zero state, in the register 10 the control signal is written as the number N, and the bus 11 is set to M, which specifies

required interval of impulse regulation from condition Tp M-Tp

In the entire adjustment range, the number N does not exceed the number M.

The signals at the information inputs of the comparator 7 are zero. The comparator on each i-OM chip implements the function no less, where A is the number at the output of the adder 8, B is the number at the output of the adder 9. Output (the comparator П нал равен is equal to 1 if at each clock cycle the content of the adder 8 is greater than or equal to the content of the adder 9 Since, in the initial state O, a single signal is supplied from the output of the comparator 7 to the element 3, which prepares the circuit 3 for switching on.

When the voltage of the network 1 appears, the driver 2 generates synchronization pulses with the frequency of the network arriving at the input of the element 3 AND prepared for switching on. The first SI includes a key 4, which, in turn, turns on the valve 5, providing switching to the load of a single power pulse of duration T, (Fig. 2). At the same time, the same SI arrives at the clock input of the adder 8, writing the contents of register 10 to it at the moment of terminating the SI, i.e. M number The first SI, passing through element 3, arrives at the clock input of the adder 9, recording the M number at its end into the adder. Therefore, after the end of the first SI, it always switches to the load of the first power pulse during the control interval Tp in the adders 8 and 9 sets the numbers -N and B-M, respectively. These numbers are compared in comparator 7. A comparison signal from the comparator output on the first cycle is used to connect to the load 6 a power pulse on the second cycle, i.e. at the time of arrival of the second SI. If A 7 / B, i.e. N 7 / M (actually it is possible only N M), a single signal is removed from the output of the comparator 7, allowing the second SI to turn on the valve 5. If A-, then the second SI does not pass through the circuit 3 And and the valve 5 does not turn on.

In the first case, A; In | at the end of the second SI, the contents of both adders 8 (T.ei 2N and adder 9 (i.e. 2M)) increase; in the second case, at the end of the second SI, only the contents of adder 8 increase. In both cases, the comparator 7 outputs a signal to the circuit 3, which determines whether the valve 5 is connected to the network at the third cycle (if A is BQ), or will not be (if A 2 Bj), which is possible with M 2N).

Thus, at each i-th adjustment stroke after the termination of the i-ro SI at comparator 7, the numbers A and Bjj are compared, written respectively in adders 8 and 9, with A g N, B M. j, where is the number of power pulses, missed to the load during the time from the beginning of the pulse control interval, to the i-ro cycle inclusive.

During the interval Tp, in the distance {similarly to the load, single power pulses are switched, the total number of which is equal to the control signal N. After M cycles (i.e., the Tp interval), the output of the counter 12, having a counting base M and connected to the output of the generator 2, a setup pulse appears, which enters the setup inputs of the adders 8 and 9, sets them to the zero state, and to the setup input of the register 10, erases the old value of the control signal and records the new one. The device is prepared for testing the control signal during the subsequent interval Tp (Fig. 2).

Claims (2)

Invention Formula Pulse AC power regulator consisting of a register and a sequence 733534 connected to the sync pulse generator, element I, associated with control signal recording and control interval setting tires, and controlled ventilator, characterized in that, in order to expand the range and increase the control smoothness, it is equipped with two totalizers and a two-input comparator which is connected to the second input 10 of the element I, and the inputs from the corresponding outputs of the adders, one of which is connected to the clock input with the output of the sync pulse generator, the information inputs and {zhgistra moves, WMO | which Au (5 are connected to the recording control buses, and the second one is connected to the adjustment interval buses, and the clock input to the output of the And element, then the preset inputs of the 2Q register and adders are connected to the output of the clock pulse generator via a counter. Sources of information taken into account during the examination .1. USSR author's certificate N 352265, cl. H 02 M 5/22, 1972. 2. Instruments and Control Systems, 1969, No. 12, p. 71-72. f- h cm to with