SU868982A1

SU868982A1 - Pulse generator

Info

Publication number: SU868982A1
Application number: SU802863407A
Authority: SU
Inventors: Александр Яковлевич Гаршин; Лев Петрович Домнин; Юрий Георгиевич Беров; Валерий Иванович Никишин
Priority date: 1980-01-04
Filing date: 1980-01-04
Publication date: 1981-09-30

Description

(54) О-ТРИГГЕР(54) O-TRIGGER

Изобретение относитс к импульсной технике.The invention relates to a pulse technique.

Известен тактируемый О-триггер, состо щий из управл ющего вентил , переключател тока с тактовым входом, источника посто нного тока и источника опорных напр жений l.A clocked O-flip-flop is known, consisting of a control valve, a current switch with a clock input, a DC source and a source of reference voltages l.

Недостатком известного триггера вл етс низка надежность из-за большой сложности.A disadvantage of the known trigger is low reliability due to its high complexity.

Известен также триггер, содержащий бистабильный элемент на двух транзисторах, эмиттеры которых соединены между собой, а коллекторы через резисторы соединены с источником питани , управл ющий транзистор, коллектор которого соединен с коллекторром одного из транзисторов бистабильного элемента, база соединена с источнике входных импульсов, а эмиттер соединен со вторым эмиттером второго транзистора бистабильного элемента, переключатель тока на двух транзисторах , коллекторы которых соединены соответственно с эмиттерами транзисторов бистабильного элемента и управл ющего транзистора, баоы подключены к генераторс1М тактовых импульсов, а эмиттеры соединены с источником посто нного токаСз.Also known is a trigger containing a bistable element on two transistors, the emitters of which are interconnected, and the collectors are connected via resistors to a power source, the control transistor, the collector of which is connected to the collector of one of the bistable element transistors, connected to the second emitter of the second transistor of a bistable element, a current switch on two transistors, the collectors of which are connected respectively to the emitters of the transistor bistable element and a control transistor connected to baoy generators1M clock and emitters are connected to a source of DC tokaSz.

Недостатком известного устройства вл етс низка помехоустойчивость из-за малой величины перепада логие ческих уровней.A disadvantage of the known device is low noise immunity due to the small value of the differential levels.

Цель изобретени - увеличение помехоустойчивости триггера.The purpose of the invention is to increase the noise immunity of the trigger.

Дл достижени поставленной цели в D-триггере, содержащем выходной To achieve the goal in a D-flip-flop that contains the output

10 транзистор, эмиттер которого подключен к первому эмиттеру входного транзистора , коллектор которого подключен к базе выходного транзистора и через резистор к общей шине, первый 10 transistor, the emitter of which is connected to the first emitter of the input transistor, the collector of which is connected to the base of the output transistor and through a resistor to the common bus, the first

15 и второй эмиттеры входного транзистора подключены соответственно к коллекторам транзисторов переключател тока, эмиттеры которых подключены к , источнику тока, база первого транзис20 тора переключател тока подключена к тактовому входу триггера, база входного транзистора подключена к первому источнику опорного напр жени , а второй эмиттер - к информационному 15 and the second emitters of the input transistor are connected respectively to the collectors of the current switch transistors, the emitters of which are connected to the current source, the base of the first transistor of the current switch is connected to the trigger trigger input, the base of the input transistor is connected to the first source of the reference voltage, and the second emitter is connected to informational

Claims

At the 25th input, the base of the second transistor of the current switch is connected to the second source of the reference voltage, the output transistor is connected to the common bus, and additional emitters30 are connected to the trigger outputs. The drawing shows a schematic diagram of a 0-trigger. The base of the output transistor 1 is connected to the collector of the input transistor 2 and through the resistor 3 is connected to the collector of transistor 1 and the zero potential bus, additional emitters of transistor 1 are connected to the outputs of the device 4 and 5, the base of the input transistor 2 is connected to the first source b of the reference voltage, the collector of the second transistor -7 of the current switch is connected to the emitters of transistors 1 and 2, and its base is connected to the second source 8 of the reference voltage, the collector of the first transistor 9 of the current switch is connected to the emitter transistor 2 and with the input information, and its base with a source of 10 clock signal, the emitters of transistors 9 and 7 are connected to each other and through the current source 11 to the power supply bus 12, the device operates as follows. If a logical O is applied to the base of the first transistor 9 of the current switch, the trigger is in the information storage mode. The source current flows through the open second transistor 7 of the current switch, the input and output transistors 1 and 2 form a Schmidt trigger, which can be in two stable states in the zero state, the input transistor 2 is open, its collector current reduces the potential at the base of the output transistor 1 The collector-emitter voltage of the input transistor, 2, in this mode, is selected by adjusting the resistance of the resistor 3 to 0.4V. This voltage is sufficient for reliable locking of transistor 1 and does not cause a noticeable saturation of the input transistor. of the transistor 2. In this mode, the outputs 4 and 5 present a level of logical zero. In one state, the input transistor 2 is closed, the connection potential of the output transistor 1 is close to zero, the outputs 4 and 5 are at the level of logical units. In the storage mode, the information supplied to the device does not change its state, i.e. . The first transistor 9 is locked, and the second emitter of the active transistor 2, which is connected to the information input, is locked, the Eoli current logical 1 is applied to the base of the first transistor, the trigger is in the information receiving mode. The current of the current source 11 flows through the open first resistor 9 of the current switch. When inputting information logic zero from the output -like device, the second emitter of the input transistor 2 is open. The current flows through the circuit: the zero-point bus resistor 3 - the collector-emitter of the input transistor 2 - the collector-emitter of the first transistor 9 of the current switch - the source 11 of the current-bus 12 of the power supply. In this case, on the basis of the output transistor 1, a low potential is found, and when the trigger is switched to the storage mode, O is recorded in it. When the logic unit information is fed to the input, the second emitter of the input transistor 2 is locked, the collector current is zero, the collector potential is zero and switching the trigger into storage mode is recorded in it 1. Connecting the base of the input transistor 2 to the source 8 of the reference voltage, which has a potential equal to minus 0.3 V, allows to obtain the value of the difference of the output levels O, 6-0.8 V, excluding transistor saturation mode. The connection of additional emitters, the groove of the output transistor 1 to the outputs 4 and 5, allows the logical expansion function of the output to be optimally realized. Connecting the second emitter of the input transistor 2 to the information input, and the base of the second transistor 7 of the current switch to the second source 8 of the reference voltage, having a potential equal to minus 1 V, allows you to match the information input and the input clock with the output of the device. D-flip-flop containing the output transistor, the emitter of which is connected to the first emitter of the input transistor, the collector of which is connected to the base of the output transistor and through a resistor to the common bus, the first and second emitters of the input transistor are connected respectively to the collectors of the current switch transistors, the emitters of which are connected to the current source, the base of the first transistor of the current switch is connected to the trigger input of the trigger, characterized by the fact that in order to increase the noise immunity, the bases the input transistor is connected to the first source of the reference voltage, and the second emitter is connected to the information input, the base of the second transistor of the current switch is connected to the second source of the reference voltage, the collector of the output transistor is connected to the common bus, and the additional emitters to the trigger outputs, Information sources, taken into account when examining 1.The Integrated Circuit Date Book Supplement, Motorola Semiconducto Products Inc. 3, 1969, p. 2-15.

2. Authors certificate of the USSR 587607, cl. H 03 K 3/286, 1978 (prototype).