SU900412A1 - Current element with arresting trigger - Google Patents

Description

(54) CURRENT ELEMENT WITH TRIGGER LATCH

Claims (2)

The invention relates to a pulse technique and is intended for use in digital automatics and computing devices. A comparator device with a trigger effect is known, containing a flip-flop and current circuits. 1 The drawback of the device is high complexity. A current element is known, which contains current busbars and a latch trigger. This current element has a first and a second current circuit with transistors, controlled by a current switch key latch. Load latch trigger elements - resistors When a latch trigger is turned on in current circuits, the currents converted into voltage by the transistors of the current circuits are compared. The voltage difference determined by the comparison circuit overturns the trigger in one steady state. The delay time of switching on and off the switch depends on the constant time of the load resistors 2. The drawback of the device is its low speed. The purpose of the invention is to increase speed. The purpose of the invention is achieved in that the current element with a trigger latch containing first and second transistors, the collectors of which are connected respectively to the first and second current buses, emitters, respectively, with the third and fourth current buses and the bases of the third and fourth transistors, collectors of which are connected with the first and second output terminals, respectively, the emitters - with the collector of the fifth transistor, the emitter of which is connected to the emitter of the sixth transistor and the output of the current source, base of the fifth and sixth ranzistorov connected respectively to the first and vtorElm the gate input device introduced seventh and eighth transistors, the base of which are connected with the third control input, the emitters - with collectors respectively third and fourth, and with the bases of the first and second transistors, collectors - a sixth transistor collector. The drawing shows a schematic diagram of the device. The current element contains the first 1, second 2, third 3, fourth 4, fifth 5, sixth b, seventh 7, all my 8 transistors, first 9, second, 10, third 11, fourth 12 current BUS, current source 13, control first bypass: first 14, second 15, third 16.. In the base circuits of transistors 1 and 2 of the current busbars, transistors 7 and 8 are connected in series with the emitter of transistor 7 and the collector of transistor 4, and the emitter of transistor 8 is connected to the base of the transistor 2 and the collector of the transistor 3. The collectors of the transistors 7 and 8 are connected to the color t anzistora b. The bases of transistor 7 and 8 are connected to the third control input 16. A bus 11 and a base of transistor 3 are connected to the emitter of transistor 1, and the emitter of transistor 2 is connected to bus 12 and a base of transistor 5. Transmitters b and 5 emitters are connected to current source 13 , the bases of transistors 5 and b with the inputs 15 of the reference voltage and the control voltage 14, respectively. The collectors of transistors 1 and 2 are connected to buses 9 and 10. The outputs are connected to the emitters of transistors 7 and 8 or 1 and 2. The current with the latching trigger operates in two modes: when the transistor 5 is turned on and the transistor b is turned off, the trigger is turned on, and the voltage on The base of one of the transistors 1 or 2 decreases, while on the other it increases depending on the sign of the difference between the currents of the current busbars or when the trigger is turned off, the voltages on the bases of the transistors 1 and 2 are balanced (with the same currents in the current buses). In order to ensure normal operation in the memory mode, it is required that Legal-Up. T.glT U6sT-i-beta where Up. - voltage drop at the junction of the transistor in the diode connection, including the voltage drop across the series volume resistance of the junction. Comparative tests have shown that the delay time for switching on and off of the latching trigger is reduced, i.e., this latching current element provides a higher speed. This allows it to be used in devices where a higher frequency of trigger switching on and off is required. The invention includes a latch trigger element comprising first and second transistors, the collectors of which are connected to the first and second current buses, respectively, the emitters with the third and fourth current buses, to the bases of the third and fourth transistors, respectively, the collectors of which are connected to the first and second output terminals, emitters - with a collector of the fifth transistor, the emitter of which is connected to the emitter of the sixth transistor and the output of the current source, base of the fifth and sixth transistors Dineny, respectively, with the first and second control inputs of the device, characterized in that, in order to improve speed, the seventh and eighth transistors are introduced, the bases of which are connected to the third control input, the emitters are connected to the collectors of the third and fourth, respectively, and bases of the first and the second transistors, collectors - with the collector of the sixth transistor. Sources of information taken into account in the examination 1.Meleshko EA Integrated circuits in nanosecond nuclear science. M., Atomizdat, 1978, p. 161, Fig.4.1.6. 2. USSR author's certificate according to the application 2807857 / 18-21,13.08.79. w fffM