SU856016A1 - Reversible pulse counter - Google Patents

Description

one

This invention relates to automation, electronic electronics and computing.

A reversible pulse counter is known, comprising reversible decimal counters, AND, OR elements, a control unit, a switch, a pulse distributor and an indicator in which a pulse distributor is used to provide a dynamic indication method and to display the true values of both positive and negative values. numbers it contains two channels of adjustment with the schema of the choice of channel-account 1}.

The disadvantage of this device is the impossibility of simultaneously displaying information on a digital display and external devices operating in binary-decimal and decimal codes, as well as more currents through key elements that switch the same elements of digital lamps, which reduces the reliability of the device.

The aim of the invention is to enhance the functionality and enhancement of detail.

The goal is achieved by having a reversible pulse counter containing reversible decimal counters with outputs connected via the first element OR to the first input of the first element AND, the second input connected to the first output of the control unit, to the first input of the second element AND, the first inputs of the reverse and the first input of the switch, and the output connected to the zero setting input of the trigger, the single input of which is connected to the second output of the control unit, the zero and single outputs three ger connected respectively to the second input of the second AND gate and the input of the pulse generator, coupled to the second output vhods1mi

20 reverse decimal counters that are connected to the switch and the first inputs of the display unit by the third inputs, the second inputs connected to the second outputs of the reversible decimal meters, the third inputs connected to the decoding unit are entered through the reverse decade, the outputs are connected through the loan pulse selector terminal and the second

30 OR element with the second input of the switch bits, and the inputs connected to the output of the third and fourth elements OR, whose inputs are connected to the outputs of the third, fourth, fifth, sixth and seventh AND elements, in which the first inputs are connected to the output of the pulse generator, the second inputs are connected via the fifth and sixth OR elements to the switch outputs, and the third inputs are connected to the second outputs of the reversible decimal meters and the inputs of the display unit.

The drawing shows a diagram of the reversible pulse counter.

The counter contains a control unit 1 reversible decimal counters 2, element 3 AND, switch 4, element 5 AND, block 6 of indication, element 7 AND, trigger 8, generator 9 of pulses, element 10 OR, reverse dendschu 1 element 12 AND, elements 13 and 14 OR, Element 15 I, a loan impulse node 16 at the transition of the reverse decade from H to O, element 17 OR, decoding block 18.

The device works as follows.

After the start signal arrives; $ indication (or registration) to the input of control unit 1 at one of its outputs appears a control signal that closes the inputs of reversible decimal counters 2 (each of them can be multi-digit) of the counting channels, opens the first element 3 And, the leading edge sets the switch 4 to the initial state and opens the second element 5 AND, at the output of which a signal appears that enables the indication (registration) of the state of the reversible ten counters 2.

However, the registration does not occur due to the fact that the switch 4 is set to the initial zero state and does not issue unlocking signals to the display unit 6. From the zero output of the switch 4, the enabling signal is fed to the input of the element 7 I. The trigger 8 is set to the initial (zero) state at the moment of switching on the reversible counter or the leading edge of the control signal. At the other output of control unit 1, polling pulses appear.

The first polling pulse switches the trigger 8 to the one state, while the permitting signal disappears at the output of the second element 5 I, and the pulse generator 9 is started. The pulses from the generator 9 through the open elements 7 AND and 10 OR arrive at the input of the direct account of the reverse decade 11, the output of which, after reaching 10, is the transfer pulse, which switches the switch 4 to the polling state of the first reversible counter 2. At the same time signal

the output of the switch 4 is fed to the input of the display unit 6, allowing registration (indication) of the state of the first discharge of counter 2 (at the same time the indication is prohibited by the signal from the output of element 5 I), and the second input of the first discharge of counter 2 opening the third the input (the input of pulses), the first digit of the counter 2.

Further operation of the device proceeds in three stages: the census of information from the first discharge of counter 2 to the reverse decade 11; registration (indication) of the status of the reverse decade 11; rewrite of information from the reverse decade 11 for the first time of the counter 2.

First stage. With a positive number in the counter 2, the pulses from the generator 9 through the open, allowing the signal trigger of the first counter 2 and switch 4 (via element 13 ILI), elements 12 AND 10 OR arrive at the input of the reverse count of the reverse decade 11, which in the zero state, and on the open third input of the first discharge channel of the second discharge of counter 2. After the completion of 10, the output pulse of the first discharge of counter 2 appears through the element 14 OR and the open first element 3 AND to the zero setting trigger input 8. The output pulses of generator 9 prekraschayuts imputation, and the second element 5 and outputs a signal allowing the registration (indication). Thus, the first digit of counter 2 is in the zero state, and the reverse decade 11 records the number previously stored in the first discharge of counter 2, as the first discharge of counter 2 begins after the reverse decade 11 passes through zero, and ends after the count the first bit of the counter 2 to 10.

If the number in the counter is negative 2, the pulses from the generator 9 through the open discharge signal from the other output of the first counter sign trigger 2 are element 15 AND, and through the second element 10 OR is fed to the direct count input of the reverse decade 11, which is before a zero state, and a third pulse of the second bit of the counter 2 is added to the open third input of the channel. After the distance to 10, the transfer pulse through the element 14 OR and the open element 3 appears at the output of the first discharge of the second bit. Era 8. At the output of the generator 9, the offset pulses stop, and element 5 And issues a signal permitting registration (indication). Thus, the first bit of counter 2 is in the zero state.

and in the reverse decade 11, the number previously stored in the first par of counter 2 is recorded, since the first bit of the second bit of counter 2 begins after the reverse of the reverse decade 11 is zero, and ends after the first bit of the second bar has reached 2 to 1p.

Second phase. Since element 5 also provides a signal that permits registration (indication), and switch 4 enables registration (indication) of the first digit of counter 2, the display unit b performs registration (indication) of the reverse decade state 11 (corresponds to the state of the first digit of the counter 2). The registration (indication) of the state of the first discharge of the counter 2 continues until the arrival of the second polling pulse from the control unit 1. The second polling pulse switches the trigger 8 to one state, while the output of element 5 And disappears, allowing the registration, and the pulse generator 9 starts.

The third stage. The pulses from the generator 9 are fed to the input of the reverse counting with a positive and to the input of the direct counting with a negative number of the reverse decade 11 and to the open third input of the equalization channel of the first bit of counter 2, which previously is in the zero state. After the reversal of the reverse decade 11, with a positive number to O, a loan impulse is realized when going from O to O with the aid of the loan impulse station 16. The pulse is switched through cell 17 or switch 4 to the polling state of the second bit of counter 2.

When the reverse decade 11 reaches 10, the transfer impule appears at its output, switching through element 17 OR switch 4 to the polling state of the second discharge of counter 2. At the same time, the input of the display 6 of the switch 4 of the discharging signal , allowing registration (indication) of the second discharge of counter 2 (and the output of element 5 I indicates the potential), the reversible decade 11 is in the zero state, and the first digit of the counter 2 is recorded the initial number.

The census of information from the second bit of counter 2 to the reversible decade 11, the registration (indication) of the state of the reversing decade 11, the census of information to the second bit of counter 2 occurs analogously described for the first bit of counter 2.

The polling pulse, received from control unit 1 after the registration of the last digit of counter 2, records the information from the reverse decade 11 for the last bit

the counter 2 and switches the switch 4, and through it the control unit 1 to the initial state, this prevents re-registration of information, since the new registration cycle is possible only after the regular impulse to the control unit 1 is received. In the case of an indication, it is not necessary to reset the control unit 1 to the initial state after each polling cycle, and the switch, after indicating the last digit of the counter 2, switches to the polling state of the first digit of the counter 2.

Thus, the proposed device produces an indication of the true values (positive and negative) of the states of the counters 2 and the output of information in binary-decimal (from the outputs of the reverse dex 11) or decimal codes (from the outputs, decoding unit 18) to the recording mechanisms, with In this case, the state of the counters 2 is polled by the clock mechanisms. Due to the random polling of the counters 2 in the proposed device, the load on the key elements of the digital lamps is reduced, which increases the strength of the device.

Claims (1)

Invention Formula Reversible pulse counter containing reversible decimal counters, output connected via the first element OR to the first input of the first element AND, the second input connected to the first output of the control unit, to the first input of the second element AND, the first inputs of the reversible decimal counters and the first input switch, and the output is connected to the zero setting input of the trigger, the single input of which is connected to the second output of the control unit, the zero and single outputs of the trigger are connected respectively to the second the input of the second element And the input of the pulse generator, the output connected to the second inputs of the reversible decimal meters, which are connected to the switchboard and the first inputs of the display unit, the second inputs connected to the second outputs of the reversible decimeter meters, third inputs connected to the decoding unit, different By the fact that, in order to expand functionality and increase reliability, a reversible decomputer was inserted into it, the outputs connected through the pulse extraction unit loan and the second element OR with the second input of the switch bits, and the inputs connected to the outputs the third and fourth elements OR, whose inputs are connected to the outputs of the third, fourth, fifth, sixth and seventh elements AND, whose first inputs are connected to the output of the pulse generator, the second inputs are connected via the fifth and sixth element OR to the outputs of the switch, and the third the inputs are connected to the second outputs of the reversible decimal meters and the second inputs of the display unit. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 463235, cl. H 03 K 29/00, 03/01/74,