SU855978A1 - Device for shaping pulses by voltage drops - Google Patents

Description

(54) DEVICE FOR THE FORMATION OF PULSES FROM POTENTIAL DIFFERENCES

The invention relates to electronics, in particular to electronic digital devices and can be used to generate pulsed signals. Known pulse shaper, containing two inverters, three flip-flops and six elements And 1. The disadvantage of this driver is the low speed of the device, the value of which is equal to the period of the clock frequency. The closest in technical essence and the achieved result to the proposed is a pulse shaper containing three triggers, an inverter, an OR element and two elements I. The device generates pulses at its outputs that are synchronous with the pulses of the clock sequence according to the control potential. The speed of the pulse former is not worse than one period of the clock frequency t2. The disadvantage of such a driver is low speed. The purpose of the invention is to increase the speed of the pulse former by means of the differential voltage. The goal is achieved by the fact that the device for forming pulses with respect to the potentials -: differential, contains an inverter and two synchronous triggers, the clock inputs of which are combined with the input clock of the device, and the control input of the first trigger is connected to the input control bus of the device and the input inverter, additionally introduced two elements AND-OR, the first inputs of the first and second elements AND the first element AND-OR connected to the input, and the first inputs of the first and second elements AND the second element AND-OR - from the output Inverter, the second inputs of the first elements and the first and second elements AND-OR are connected to the inverse output of the first trigger, the direct input of which is connected to the second inputs of the second elements AND the first and second elements AND-YLI, the third inputs of which are connected to the inverse output of the second trigger The control, whose input is connected to the input of the inverter, and the direct output of the second trigger, to the third inputs of the first AND elements of the first and second AND-OR elements.

FIG. 1 shows a functional diagram of the device; in fig. 2 time diagrams of his work.

The device for forming pulses with respect to the potential drop contains triggers 1 and 2, inverter 3, elements 4 and 5, input control bus b of control action, input bus

7-stroke pulses and output buses

8 and 9.

It should be noted that in this device the O-flip-flop 2, triggered by the 1/0 difference, is made according to the scheme of three B5 triggers on the six elements OR-NOT and the flip-flop 1, triggered by the differential 0/1 - on the six elements NAND.

The device works in the following -1M manner.

In the initial state, both 0-flip-flops 1 and 2 are set to the zero position, when unit potentials are present at the inverse outputs of both triggers. At the same time, there is no control action on the corresponding inputs of the device and there are pulses of the clock frequency.

When the 0/1 differential voltage appears, the control voltage in the pauses between the clock pulses first triggers the O-flip-flop 1. This ensures the appearance of a single potential at its direct output, therefore, the opening of the second element AND the logical element AND-OR 4 Thus, at the output of the driver (bus 8) before the scientific research institute, the front of the output pulse appears no more than through the poperiod of the clock frequency. Trigger 1 is triggered by a differential clock of 2, i.e. at the output of the ISH-4, the rising edge of the pulse formed by the device on the 0/1 differential of the control action appears. The output pulse is synchronous with the clock frequency pulse and simultaneously tied along the edges. Before the arrival of the 1 / O differential control, no new impulses will be generated at the device outputs.

When a 1/0 differential voltage appears, the control voltage in the pause between clock pulses triggers D-trigger 1 first. This ensures the appearance of a single potential at its inverse output and, therefore, opening the first element and the AND-OR logic element 5. Thus, at the output of the driver (bus 8), the leading edge of the output pulse appears no more than half a cycle of the clock frequency. Trigger 1/0 impulse clock frequency trigger 2 is triggered, i.e. on the extremity of the element AND-OR 5, the rising edge of the pulse formed by the device on the 1 / O control action differential appears. The output pulse is synchronous and simultaneously tied along the edges with a clock pulse. The device is in its original state.

When the voltage 0/1 appears, the control voltage in the presence of a clock pulse on Etin 7 is first triggered by the O-flip-flop 2. This provides for the left potential at its inverse output and, therefore, the opening of the second element I of the logic element I- OR 4. Thus, at the output of the driver, the leading edge of the output pulse appears no more than half a cycle of the clock frequency. Trigger 0/1 of the next clock pulse triggers trigger 1, t, e. at the output of the AND-OR element 4, the leading edge of the pulse generated by the device by the 0/1 differential of the controlling action appears; the output pulse is synchronous and simultaneously tied along the fronts to the pause of the clock frequency 7 ° 1, before the arrival of the differential 1/0 of the controlling influence pulses at the outputs of the device will not form.

When the differential 1 / O voltage appears at the moment of the presence of a clock frequency pulse, D-flip-flop 2 triggers first. This ensures the appearance of a single potential at its inverse output and, therefore, the opening of the second AND AND5 element. Thus, at the output of the former front

the output pulse does not appear more than half the clock frequency period. By the 0/1 differential of the next clock pulse, trigger 1 is triggered, i.e. at the output of the IZH-5 element, the back edge of the pulse formed by the device on the 1/0 differential of the control action appears. The output pulse is synchronous and simultaneously tied along the edges to a pause in the clock frequency. The device is in its original state.

The pulse shaper normally operates when a control action is applied to its input for the duration of a larger period of the pulse frequency.

Thus, at the output of the device, pulses are synchronized with a clock frequency with respect to differences in the potentials of the control action with a speed not worse than a half cycle of the clock frequency.

Claims (2)

Invention Formula A device for generating impulses by potential drops, which contains an inverter and two synchronous triggers, the clock inputs of which are combined with the input clock of the device, and the control input of the first trigger is connected to the input control bus of the device and the inverter inputs, characterized in that, in order to speed, two additional AND-OR elements are introduced into the dongo, the first inputs of the first and second elements of the first AND-OR element are connected to the input, and the first inputs of the first and second elements are And the second element enta AND-OR with the output of the inverter, the second inputs of the first elements AND the first and second AND-OR elements are connected to the inverse output of the first trigger, the direct input of which is connected to the second inputs of the second AND elements of the first and second AND-OR elements, the third inputs which are connected to the inverse output of the second trigger, the control input of which is connected to the input of the inverter, and the direct output of the second trigger to the third inputs of the first elements And the first and second elements are AND-OR. Sources of information taken into account in the examination i, USSR Copyright Certificate No. 509994, cl. H 03 K 5/00, 1974. 2. USSR author's certificate No. 541279, cl. H 03 K 5/01, 1975 (prototype) P П П П П П П rLTL П ПГТ ГТ П Г1 n Jt  A / g.2 h -P.