SU851765A1 - Digital single pulse registering device - Google Patents

Description

I

The invention relates to digital recording devices and can be used in measurement technology for recording single long-duration pulse signals having one or several rapidly changing phases. Its application is especially effective when the ratio of the signal duration (T) and the duration of rapidly changing phases (t) is longer. Q

A device for recording electrical signals is known, in which an analog signal is sampled and quantized, and then digital data is written to a memory device.

The disadvantage of this device is the impossibility of detecting the rapidly changing phases of the electrical signal.

Also known is a digital single-pulse recorder containing a series-connected sensor. signal, analog-to-digital converter and storage device, as well as a pulse generator, the output of which is connected to the control inputs of the analog-digital converter and storage device 2.

However, in a known recorder, when storing information accumulated during the recording of long-lasting signals, a significant amount of memory is required. For example, the required storage space in the known recorder is 3 Tc / t 15509 () 7500 (15-103, 15-10), a bit, where T./t 500 (10, 10), and the quantization period provides at the signal front at least three samples, and each sample is a five-digit code.

The purpose of the invention is to reduce the amount of information stored during registration.

The goal is achieved by the fact that the digital single-pulse recorder, which contains a signal sensor and a pulse generator, is connected respectively to the information and control inputs of the analog-digital converter, a storage device, the synchronization input of which is connected to the output of the pulse generator, and the information input - to the output of the analog a digital converter, a control unit, a logic unit, an additional memory and a master device are entered, and the sensor output is Connected to the first input of the control unit, the second and third inputs of which are connected to the control, respectively, the outputs of the additional memory and the driver's time, the output of the control unit is connected to the first control input of the additional memory, and the time of the master device, whose information output is connected to the first information input of the additional storage device, and the information and control outputs are one unit are respectively connected to the control inputs of the additional information storage device.

The drawing shows blkK diagram of the proposed device.

The output of the sensor signal 1 is connected to the first input of the control unit 2 of the information input of the analog-digital converter 3, to the control input of which is connected to the 4-pulse generator generator. The output of the generator 4 is also connected to the synchronization input of the memory device InformationOn & 1st output of the analog-digital converter 3 is connected to the information inputs of the storage device 5 and the logic unit 6. The output of the control unit 2 is connected to the control inputs of the storage device 7 and the setting device time 8. First and the second outputs of logic unit 6 are connected respectively to the information and control inputs of the additional storage device 7, to the information input of which the signal Inonii corresponding output driver device 8. The time .. The second and third control inputs are connected control inputs of further memory block 2, 7 and 8, the time setting device.

When recording a signal, the digital recorder operates in two modes; the registration mode of the rapidly changing signal phases (mode t) and the registration mode of the remaining signal phases (mode). The mode of operation of the registrar is determined by control unit 2.

The operation of the recorder in mode 1 starts from the moment it is turned on under voltage and ends after the control signal of the end of the first fast phase (front) of the signal coming from sensor 1 output from the output of control unit 2. In the simplest case, the control signal can be generated in series differentiator, Schmitt trigger and delay line. After turning on the power source, the signal from the output of sensor 1 at the time point determined by the pulse generator 4 is subjected to an analog-to-digital converter. The digital signal from the output of the analog-to-digital converter 3 is fed to the storage device 5. In the simplest case, the storage device 5 is a set of shift registers. Digital data is stored in memory 5 for some pre-selected period of time Td (after which new data is recorded in their place. The TQ time must be longer than the response time of the above differentiating device, Schmitt trigger and delay line. After the signal from the block output 2 controls to the input of the storage device 5 digital data recording is stopped (the previously recorded data is stored) and the recorder starts operating in O mode.

The registration of slower phases (as compared to the front) of the signal is carried out in a manner that is.

Claims (2)

When the signal from the output of control unit 2 arrives, the time setting device 8 (in the simplest case, a binary counter) starts counting the time and the additional storage device 7 records digital data from the output of logic unit 6 and the time setting device 8 when the code combination at the output of the analog-to-digital converter 3 changes. A logic block generates a pulse at the information output if a change in the code combination occurs, and 1 appears at the control output if an increase in the code value occurs. th combination, and –O, if its decrease occurred (the code combination is changed by a lower-order unit). The impulse arriving at the information input of the additional storage device 7 records the moment of time (digital data comes from the output of the setting device 8 to the information input of the additional storage device), changes in the code combination and signal value (O or 1 incoming from the logical unit 6. Upon receipt of the second (and subsequent) fast phases of the signal, the control unit 2 generates a signal that records in the additional memory 7 data x is the time of arrival of the recorded fast phase and the transition per gistratra to the first mode of operation. Thus, during the time Td, digital data is recorded in the memory 5 at the times specified by generator 4. After time T (from the moment the fast phase arrives signal) the recorder. again goes into operation mode 2. The registration process stops either when the control input of the control unit 2 of the signal from the output of the memory 6 overflows to it, or when it arrives at the input block 2 of the control signal from the output time setting device that the registration was conducted. more than time 1. Thus, when registering fast phases of a signal, 5 values of the signal are recorded into the memory at regular intervals determined by generator 4, and during registration of slow phases of the signal, 5 additional values of the times at which the change occurs (at the unit of the least significant bit of the signal from sensor 1 output, and the data (O or 65). About the direction of change (about reducing or increasing it), the present invention can replace magnetic tape recorders, magnetic disks and storage oscilloscopes. Compared with known digital recorders, the proposed device allows to reduce the amount of memorized information to an acceptable amount (bit). Invention A digital single-pulse recorder containing a signal sensor and a pulse generator connected respectively to the information and control inputs of the analog-digital converter, a memory device. The synchronization input of which is connected to the output of the pulse generator, and the information input with the output of the analog-digital converter Characterized in that, for the purpose of eisheni amount memorized in the registration information entered into it upravleg unit. neither the logical block, the additional memory and the driver time, while the output of the signal sensor is connected to the first input of the control unit, the second and third inputs of which, respectively, are connected to the first outputs of the additional memory and the control unit is connected to the first control the input of the additional memory device and with the control inputs of the eap of the tying device, and the time of the setting device whose information output is connected to the first an additional data input, storage, and control informatsionsh) Lok logical outputs are connected to data inputs of channeling yuschemu Accessory Device Features memory. Sources of information taken into account in the examination. Patent Cnut Cl, 340-347, 01.07.76. 2. Electronics., 1963, No. 18, p.26 / prototype). -four f -E -Ei