SU851744A2 - Digital adjustable delay line - Google Patents

Description

w

Union of Soviet

Socialist

Republics

DESCRIPTION

INVENTIONS (| TS851744

TO AUTHOR'S CERTIFICATE (61) Additional to author. Certificate No. 457158 (22) on October 18, 79 (21) 2837979 / 18-21 with the application No. - (51) M. Cl

H 03 H 9/30 (23) Priority

Published ^ OA.07.81. Bulletin No. 28

Date of publication of the description 07/30/81.

(53) UDC 621.374., .5 (088.8) (72) Author of the invention (71) Applicant

(54) DIGITAL ADJUSTABLE LINE

DELAYS

The invention is igssigsya to measuring technique and can be used when measuring the coordinates of objects.

Known digital adjustable delay line by auth. St. N »457158, comprising a counting pulse generator, a two to ⁵ input matching element, a working counter, a control counter, a Comparison unit, a key connected to the source of the mismatch signals [IJ.

However, this device has low accuracy due to possible recordings to the working counter, after resetting from the pulse of the comparison unit, the pulses of the counting pulse generator, the passage of which through the coincidence element is possible due to different trigger times of the trigger and the working counter.

The purpose of the invention is to increase the accuracy of the resulting delay. The goal is achieved by the fact that the matching element is connected to the input of the working counter, the outputs of all bits of which are connected to the corresponding inputs of the comparison unit, to the second inputs of which the outputs of analogous bits of the control counter are connected, and the output of the comparison unit is connected to the output of the delay line and the first input of the trigger, the second input of which is connected to the input of the delayed pulse, a single output of the trigger is connected to the second input of the coincidence unit, the output of the key connected to the input of the signal Harmonization is connected to the input of the control counter introduced inverter having an input connected to the output of the comparator, and the output - to the bus counter zero setting of working and to the input key.

The drawing shows a functional diagram of the device.

The digital adjustable delay line contains a control counter 1, a working counter 2, trigger 3, delaying input 4 Something into a digital adjustable delay line containing a counting pulse generator, whose input is through a two-pulse input, 5 counting pulse generator, 6 coincidence element, block 7 comparison, output 8 of the delay line, inverter 9, key 10, control input 11 of the error signal. 5

The delay line works as follows.

In the control counter 1, by any of the known methods, before the start of the delay line operation, a certain number of 10 K is recorded, which determines the required pre-set delay value of the CT scan, and in the working counter 2 at the moment of the delayed pulse 3 entering the input, from the input 4, which allows 15 the arrival of the counting pulses of the generator 5, through the element 6 matches. The working counter 2 sums up the impulses arriving at its input until the codes of counter 2 and counter 1 coincide — 20 drop, which is formed using the comparison element 7, the output signal of which goes to the first input of the trigger and sets it to the the passage of pulses from the generator 25 5 to the input of the counter 2 and to the output 8 of the delay line. The leading edge of the pause pulse from the output of the inverter 9 is fed to the zero-setting bus of the counter 2 and to the input of the key 10.

From the output of the key 10, the pulse enters the counting input of the control counter 1 for addition (or subtraction) only if the resolving potential (mismatch signal) is located on the control input 11 of the key 10 '.

Thus, the proposed delay line allows to increase the accuracy due to the diversity, with the help of the inverter, the reset times of the trigger and the working counter.

Claims (1)

The invention relates to measurement technology and can be used in measuring the coordinates of objects. Known digital adjustable line zatoszhki auth. St. N "457158, containing a counting pulse generator, tsv vohotsov element of coincidence, work counter, control counter, power block, key, connected to the source of the error signals. However, this device has low accuracy due to possible entries in the work counter, after reset from the pulse of the comparison unit, the pulses of the generator of counting pulses, the passage of which through the coincidence element is possible due to the different trigger times and the working counter. The purpose of the invention is to improve the accuracy of the resulting delay. The goal is achieved by the fact that in a ci-adjustable adjustable delay line containing a generator of counting pulses, the input of the second through two OUTPUT matching elements is connected to the input of the working counter, the outputs of all bits of which are connected to the corresponding inputs of the comparison unit, to the second inputs of which are connected analogous outputs control counter, and the output of the comparison unit is connected to the output of the delay line and to the first trigger input, the second input of which is connected to the input of the delayed pulse, The trigger trigger output is connected to the second input of the coincident output of the key connected to the variance error loop, connected to the input of the control counter, an inverter is inputted to the output of the comparator unit, and the output is connected to the working counter zero bus and the key input . The drawing shows a functionaldiagram of the device. Digital adjustable delay line centers control counter 1, work counter 2, trigger 3, input 4 delaying the 38517 th pulse, generator 5 counting pulses, element 6 Coincidences, comparison block 7, output aaerm line 8, inverter / tor, key 10, control 11 CI1 input mismatch input .5 The containment line works in the following way. At the end of one of the known methods of starting the back-up line, write a certain number 10 K, which determines the required pre-set / quench delay value of the CT, and in the work counter 2 at the moment the trigger 3 arrives at the entry impulse. from input 4, which allows 15 arrivals of counting pulses; 71c generator 5, through element 6 coincidence. Work counter 2 summarizes the pulses arriving at its input until the codes of counter 2 and counter 1 fall, which is formed by comparing element 7, the signal from whose output goes to the first trigger input and sets it to prohibiting the passage of pulses from the generator 25 5 to the input of counter 2 and to the output 8 of the delay line. The leading edge of the pause pulse from the output of the inverter 9 is fed to the 44 bus of the zero setting of the counter 2 and to the input key of the key 10. From the output of the key 10, the pulse arrives at the counting input of the control counter 1 of addition (or subtraction) only on the control input 11 key 10 is the enable potential (the error signal). Thus, the proposed collar line improves accuracy for spacing, using an inverter, trigger reset times and a working account. Invention formula Digital adjustable delay line by auth. N 457158, that is, in order to increase accuracy, an inverter is introduced into it, the input of which is connected to the output of the comparison unit, and the output is connected to the zero bus of the working counter and the input of the key taken into account during the examination 1. USSR author's certificate №457158, cl. H 03 H 9 / ZO, 25.O2.72 (prototype).