SU845165A1 - Device for identifying particle tracks - Google Patents

Description

one

. The invention relates to the field of automation and computer technology and can be used to recognize linear elements of tracks when processing experimental data.

Devices are known for recognizing tl particle tracks containing multi-wire proportional chambers and reading and recording blocks C of proportional chambers. In such devices, each wire has its own channel, which contains an amplifier and a register trigger.

After the pulse has passed from the triggered wire to the trigger of the register of information, all the triggers are read into the computer for further processing.

The known devices require a large amount of computer memory, and considerable time is spent on reading information from the proportional chambers.

The closest in technical essence to the invention is a device for recognizing particle tracks 2, comprising first and second computational units, four buffer registers, a decoder and an address generation unit, one of the inputs of which is connected to one output of the control unit, and the output to the first the input of the information exchange unit, the second input of which is connected to the output of the first computing unit. The inputs of the latter are connected respectively to the outputs of the first and second buffer registers.

10 and a memory block whose inputs are connected to another output of the control unit and the output of the decoder, the input of which is connected to the output of the second computational unit and the input of the unit

15 comparison, the output of which is connected to the input of the control unit. One of the inputs of the second computing unit is connected to the output of the third buffer register, the inputs of the first and second

20 buffer registers and another input of the address generation unit are connected to one of the outputs of the information exchange unit.

The information exchange unit provides the logical and electrical interfacing of the device with the universal computer and carries out the reception of a macro command into the device and the transfer to the computer of the device state word, as well as 30 exchange of information between the device

and operative memory of a computer. Through the direct access channel, the device interacts with the computer as a processor, and the information received from the computer is loaded into the receiving registers of the device.

The disadvantage of such a device is that it allows recognition of tracks only in a study area that is defined in terms of volume and configuration. Recognition of track elements in areas of study other than the target is difficult and time consuming.

The aim of the invention is to improve the speed of the device with different configurations of the study areas.

This goal is achieved by the fact that the proposed contains the fifth and sixth buffer registers, the code shift block and the third computing block, the outputs of which are connected to another input of the second computing block, and the inputs to the outputs of the fourth and sixth buffer registers. The output of the fifth buffer register is connected to one of the inputs of the code shift block, the output of which is connected to the inputs of the third and fourth buffer registers, and the inputs of the fifth and sixth buffer registers and another input of the code shift block are connected to other outputs of the information exchange block

FIG. 1 shows a block diagram of the device; in fig. Figure 2 shows the configuration of the study area; Fig. 3 explains the principle of construction of the registers of the memory block; FIG. 4 - the principle of the organization of cracks, in FIG. 5 shows the principle of changing the configuration of the study area.

The device contains information exchange unit 1, fourth, third and first buffer registers 2,3 and 4, second computational unit 5, decoder b, comparison unit 7, memory unit 8, first computational unit 9, control unit 10, address generation unit 11 , the second, fifth and sixth buffer registers 12, 13 and 14, the third computational unit 15 and the code shift block 16.

The proposed device works in conjunction with a universal computer and is designed to process information from the measuring-recording system with raster decomposition, pictures from the camera.

The device recognizes the rectilinear elements of the tracks, using as reference the segments of straight, fanlikely located in the study area of the triangular configuration (see Fig.2) and passing through the top of this area. The area of study includes N lines of decomposition of the picture (rasters). In Fig. 2, lines

expansions are numbered: T, P, 111, ... K. . . N-1, N. The points recorded on the fragment are marked: A (top of the study area), b, c, d, e, f, g, h, j, k, e, m, p. In Figure 2, J denotes also the standards (slits) with which the elements of the tracks are recognized - 1.

BUT h - 11 id 11 p.IM g.

 I -V g .. PH, P.

The basis of the proposed device

Q is a recognition logic node consisting of memory block 8 and first computing block 9.

Consider the principle of building a logical recognition node. Information registered on

5, the picture field bounded by the study area is displayed in the device on special registers of the memory block 8, which is an array of row registers each

0 of which is intended to display information registered only on one decomposition line. The total number of registers is equal to the number of decomposition lines included in

5 area of study. According to FIG. 2, the total number of registers is N. Based on the triangular configuration of the study area, the number of bits in the registers is different.

n Thus, the register at the vertex contains one trigger, and the register at the base of the study area - n triggers. V. FIG. 3 shows the principle of organizing an array of registers of memory block 8. The register number corresponds to the number of the decomposition line, information from which is displayed by this register. The bits (triggers) of the registers form columns. From figure 2 it is seen

0 what's points registered on

one line of decomposition, have the same y coordinate, and differ only in the x coordinate. Two points registered on the same decomposition line and differing in the X coordinate by one counting of the recording system are displayed in one register of lines by two adjacent bits. Therefore, points recorded on different decomposition lines (differing in the y coordinate) and having the same x coordinate are displayed in different row registers of the same row column. Record

- the information in the register register is carried out when the signal over the column and the signal over the row coincides.

The memory block 8 is a trigger memory of the coordinate type with bitwise

0 recording information.

The entire set of bits of string registers is organized in slots, which are analogous to the standards of the desired images. Principle

5 organization slits shown on

FIG. 4 (4 slits are shown: H 1, B2, tf 3, 4) 4).

The analysis of the state of the triggers combined in the slots produces the first computing unit 9. The output of the information exchange unit 1 is connected by a code trunk for transmitting information received from the computer to the input of the address generation unit 11, which is used to form the execution address of the AC when it is connected to the computer for recording or fetching information;

with the input of the code shift block 16 for shifting the code of the coordinate of the top of the study area and the codes of the coordinates of points recorded in the picture from the track camera,

with the input of register 4 for storing the discrimination threshold code,

with the input of register 12, which serves to store the code of the direction number of the number determining the slot in which the points are identified /

with the input of a register 13 serving to store the scaling code (the scaling code determines the magnitude of the shift of the coordinate codes);

with the input of register 14, the purpose of which is to store the code for the shift of the middle of the line.

The output of the code shift block 16 is connected to the inputs of registers 3 and 4. Register 2 is designed to store (generally shifted) the code of the coordinate of the top of the study area. Register 3 is used to receive codes of the coordinates of points recorded in the picture from the track camera.

The outputs of registers 2 and 14 are connected to the inputs of the computing unit 15, which is intended to form a mid-line code.

The outputs of the register 3 and the computing unit 15 are connected to the inputs of the computing unit 5, the output of which is connected to the inputs of the matching unit-7 and the decoder 6, the outputs of which are connected to the inputs of columns (see Fig. 3) of the memory unit 8, to the inputs of which lines are connected tires of one of the outputs of the control unit 10.

The outputs of the triggers of the memory block 8, organized in the slots (see Fig. 4), are connected to the inputs of the computing unit 9, the other inputs of which are connected to the outputs of the registers 4 and 12.

The second output of block 10 and the outputs of blocks 9 and 11 are connected to the inputs of block 1 of information exchange.

The proposed device works as follows.

When the devices are ready for operation, it forms a request signal to the computer interruption system and generates a status word on the nporpafviMHoro information bus of the machine channel. By processing the interrupt, the computer accepts the status word, analyzes it and, if the device is healthy, transmits it to the last macro. The operation of a computer device is controlled by macros. Macro execution by device — procedure Before sending the macro command to the device, the main processing program prepares the initial data for the procedure (constants, c1 addresses for storing code lists of registered points, etc.) in the main memory of the computer. This data is placed in a fixed memory area that is fixed in volume and location and accessible to a device and has a predetermined structure. The same device in a fixed area of memory puts the results of processing. During the procedure, the device interacts with the computer via a direct memory access channel autonomously (without a program share) as a processor. After completing the procedure, the device again generates a signal into the computer interruption system, etc.

The offset code for the midpoint of the Kth row is taken to register 14. This information is selected from the computer once per line.

The selection itself is carried out as follows. At a given address, the code of the coordinate of the first in order order point registered on the K-th decomposition line is selected from the RAM of the computer. From the output of bjiOKa 16 code shift, the shifted coordinate code is entered into. register 3. From the output of register 3, the information enters the input of the computational unit 5, the other input, which receives the information of the output of the computational unit 15. In the process of selecting points on the Kth row, at the output of block 15, the code of the center of the line will be generated.

Upon receipt of the macro, the device through the information exchange unit 1 sequentially selects from the computer and writes into the buffer registers information unchanged during the execution of the entire procedure: the discrimination threshold code is received into the first register 4 — the region vertex code is entered into the register 2 through the code shift block 16 study, and in the register 13 is accepted scaling code.

Claims (2)

1.Nikityuk N.M. and others. A new way to register information from coordinate proportional cameras. Preprint of the Joint Institute for Nuclear Research, Dubna, 1977, 0 s. 15. 2. USSR author's certificate number 546909, cl. G 06 K 9/00, 1974 (prototype). F / ffj AJ CffC / ffeAy A computer I ffjye / M / AwKf  t j y F l-1 1