SU842969A1 - Storage device with information circulation - Google Patents

Description

(54) STORAGE DEVICE WITH CIRCULATION

INFORMATION of equal pulses, the output of which is connected to the second input of the information pulse generator and the input of the recording pulse selector, the output of which is connected to the second input of the first key, the output of the clock pulse selector connected to the first input of the clock pulse generator, the second input of which is the device start input, a counter, a second pulse generator, a low-pass filter and a second key are entered, the counter input of the counter is connected to the output of the control pulse former, the The second input is with the output of the clock pulse generator, and the output is with the input of the second pulse generator, the output of which is connected to the first input of the second key, the second input of which is connected to the output of the detector, and the output to the input of a low-pass filter whose output is the output of the device . FIG. 1 shows a block diagram of the proposed device; in fig. 2 shows time diagrams of voltage at various points of the device. The device contains (Fig. 1) a shaper 1 clock pulses, a modulator 2,. first delay element 3, amplifier 4, detector 5, clock pulse selector 6, forming a clock circulation ring, second delay element 7, information pulse shaper 8, first pulse generator 9, control pulse shaper 10, first write pulse selector key 12, counter 13. second pulse generator 14, second key 15, low-pass filter 16, information input 17, output 18 and device start input 19. The first input of the first key 12 is the information input 17 of the device. The output of the imaging unit 8 information pulses is connected to the output of the first key 12, the output of the imaging unit 1 clock pulses by the input of the first generator 9 of pulses and the input of the modulator 2, the output of which is connected to the input of the first delay element 3, the output of which is connected to the input of the amplifier 4. The input of the detector 5 is connected to the output of the amplifier 4, and the output to the input of the selector 6 clock pulses and the input of the second delay element 7, the output of which is connected to the first input of the driver 8 information pulses. The output of the first pulse generator 9 is connected to the input of the control pulse generator 10, the output of which is connected to the second input of the information pulse generator 8 and the input of the write pulse selector 11, the output of which is connected to the second input of the first key 12. The output of the clock selector 6 is connected to the first input a clock generator 1, the second input of which is the device start input 19. The counting input of the counter 13 is connected with the output of the control driver generator 10, the setup input with the output of the generator of 1 clock pulses, and the output output with the input of the second generator 14 of pulses, the output of which is connected to the first input of the second key 15. The second input of the second key 15 is connected to the output of the detector is 5, and the output is with the input of the low pass filter 16, the output of which is the output 18 of the device. The serially connected modulator 2, the first delay element 3, the amplifier 4, the detector 5, the second delay element 7, and the information pulse shaper 8 form an information pulse circulation ring. FIG. 2 depicts clock pulses (Fig. 2a) circulating in a ring of clock pulses, a sequence of control pulses (Fig. 26), recording pulses (Fig. 2 c) received from the output of the selector 12 recording pulses (Fig. 1) pulses (Fig. 2 g), coming from the output of the first key 12 (Fig. 1). FIG. 2D shows information pulses circulating in the ring of information pulses. FIG. 2e shows single pulses at the output of the counter 13 (Fig. Ij in Fig. 2) - the pulses produced by the second pulse generator 14 (Fig. 1), and in Fig. 2 and - the information pulse coming from the output of the detector 5 (Fig. 1) through the second key 15 to the input of the low-pass filter 16. The device operates as follows: The clock pulse shaper 1 operating in the standby mode is supplied with an external single trigger pulse at the device start input 19. The clock pulse shaper 1 produces a square pulse with the specified parame which enters the input of the modulator 2, and further, into the ring of circulation of the clock pulse. Stable circulation of the clock pulse with a period equal to the delay time of the first delay element 3 (Fig. 2 o) is formed. - The worldviewer 1 clock pulses is fed to the input of the first generator 9. Pulses generating a pulse following with a period T TjN, and with the arrival of the clock pulse a phase adjustment occurs along its front of oscillations of the first generator 9 pulses. The pulses produced by the first pulse generator 9 are converted by the driver of the control pulses 10 into a sequence of control pulses with a follow-up period and a duration of 0.5T (y; it and selector input 11

write pulses, where the first control pulse, following the clock pulse, is selected and enters as a write pulse to the second input of the first key 12 (Fig. 2 b), opening it. At the output of the first key 12, an information pulse is formed (Fig. 2d, d) which enters the information pulse circulation ring, where it is delayed by the time t3, o (DT is the delay time of the second delay element 7 equal to Ti) and again arrives at the input of the module torus 2 with the restored parameters, delayed relative to the clock pulse for a time equal to DT. In this case, a new information pulse will be emitted into its previous place (relative to the clock pulse), and so on until the memory is filled, after which the information pulses recorded first are erased and the recorded information is updated.

Due to the fact that each information pulse corresponds to a control pulse that coincides with it in time, and the displacement of information pulses relative to a clock pulse during the circulation period is equal to DT, it is possible to organize the reading of the recorded information pulses after 1g of circulation (I.). At the same time, the first information pulse displaced from the clock pulse by the time of the PDT will correspond to the nth control pulse for reading the counting input of the counter 13, which has the recalculation coefficient n, receives a sequence of control pulses. With the arrival of the nth control pulse, a single pulse is set at the output of the counter 13 (Fig. 2e), while the second pulse generator 14 produces a single pulse with the parameters of the control pulse (Fig. 2 and), which is fed to the first input of the second key 15, opening it, and the first information pulse corresponding to the nth control pulse, comes from the output of the detector 5 through the second key 15 to the input of the low pass filter 16. The delay time of the information pulse relative to the moment it enters the storage device 1z p (Tz + DT) (Fig. 2), then the clock pulse arriving at the installation input of the counter 13 from the output of the 1.actor pulse former, sets the counter 13 to the state O and the reading process is repeated, but the next information pulse already arrives at output 18 of the device; Thus, a sampled input signal is applied to the input of the low-pass filter 16, which is delayed by a time t3 p (T3-fD T), which is proportional to the recalculation coefficient of the counter 13 and can vary with the threshold T3 + DT. The filter 16 of the low frequencies restores the parameters of the information

pulse arriving at the output 16 of the device.

In the proposed device, an adjustable delay of an unlimited duration of a circulating information pulse is provided without changing the time scale of the delayed pulse at the output of the device, thereby increasing the reliability of the memory with information circulation.

Claims (2)

1. USSR Author's Certificate No. 204376, cl. G And C 21/00, 1967. 2. Author's testimony; According to application number 2600783 / 18-24, cl. G 11 C 21/00, 1978 (prototype). Jl D. On.