SU841057A1 - Analogue storage device - Google Patents

Description

(54) ANALOG STORAGE DEVICE

I

The invention relates to information technology and can be used to store the maximum value of a pulse signal with a long storage time.

An analog storage device (AMS) is known that allows the maximum value of a pulse signal to be memorized and contains an amplifier, a diode, a capacitor 1.

However, the CCD has a lack of accuracy when operating in a wide dynamic range of input signals.

The closest in technical essence to the present invention is an ABC, which contains an amplifier, keys, a source follower, capacitors and comparators, an operational amplifier, an And element and an RS flip-flop 2.

However, this device works well in a wide dynamic range, but the storage time is short, due to the fact that after storing the maximum signal value, the voltage drop on the switch is large and a large leakage of charge from the capacitor occurs during storage.

The purpose of the invention is to increase the storage time of the device.

The goal is achieved by the fact that in an analog storage device containing first and second storage elements, capacitors, one of the plates of which are connected to the zero potential bus, the other cover of the first capacitor is connected to the control input of the current generator and through the first switch to the output of the operational amplifier, non-inverting input of which is connected to one of the inputs of the first comparator, to the output of the device, to the output of the source follower, to the non-non-rotating input of the operational amplifier, and the black of series-connected second and third switches with vy.hodom

ycilitev, the amplifier input is connected to another input of the first comparator and through the delay element to the device input, the second comparator, one of the inputs of which is connected to the device input, and the other input with a well, ninth potential, RS trigger, the S input is connected to the output second comparator. The R-trigger of the RS flip-flop is connected to the bit bus, the output of the amplifier is connected to the input of the source repeater and another plate of the second capacitor through the third and fourth keys connected in series, the fifth key, the AND element, the OR element and the inverter, whose output is connected to the control input of the second key, the input of the inverter is connected to the output of the OR element and the control input of the first key, the output of the AND element is connected to the control of the iJiHM input of the third key, the first inputs of the AND and OR elements are connected to the output of the first comparator, and the second inputs are with the direct and inverse outputs of the RS flip-flop, respectively, the inverting input of the operational amplifier is connected to the zero potential bus via a fifth key, the control inputs of the first and fifth keys are connected to the inverted output of the RS flip-flop, the output of the third is connected with the inverting input of the operational wuxi, the inhabitant.

The drawing shows a functional diagram of 1) ed-1-paged analog storage device.

The device contains a delay element 1, a booster 2, keys 3-7, accumulative elements, such as capacitors 8 and 9, comparagors 10 and 11, operational amplifier 12, current generator 13, RS flip-flop 14, elements AND 15, inverter 16, element OR 17. Highlighting repeater 18, discharge level 19, zero potential 20.

The setup is as follows.

In the initial m state, a discharge pulse is applied to the R input trigger ia 14, the zero output of the trigger 14 is set, and the inverse output of the trigger 14 is 1, then the keys 6, 3 and 7 are closed, and 5 and 4 open. At the input of the source follower 18 and the inverting input voltage, the de-amplifying amplifier 12 is zero, then when the gain is increased, the amplifier and the amplifier are greater than 1000, the voltage on its non-inverting input tends to zero. Consequently, the voltage drop on the capacitor 4 is zero.

When a positive polarity arrives at the device input, the amplitude of which needs to be remembered, the comparator 11 operates and the trigger 14 overturns, then it appears at its direct output, and zero at the inverse output, where the keys 3 and 7 open. After the delay time, element 1 triggers the comparator 10, since the capacitor 9 is discharged and the output of the device is zero. A pulse from comparator 10 passes element 15 and closes key 5, passes element OR 17 closes key 6, and pass inverter 16 opens key 4. Since key 3 is open, the voltage across the capacitor 8 is memorized so that the current flowing through the generator 13 current, caused the potential difference of the gate-source of the source follower 18, equal to zero.

The gain of the amplifier 2 is chosen a little more than 1, then the capacitor 9 starts to charge faster than the input signal rises. After some time, the voltage on the capacitor 9 exceeds the voltage of the input signal, while the comparator 10 turns off, which leads to the opening of the keys 5 and 6, and the key

0 4 closes. If the input signal continues to grow, the comparator 10 tilts again and the keys 5 and 6 are closed, and the key 4 is opened. This will continue until the input signal reaches the maximum value, after which the keys 5 and 6 remain in the open state, and the key 4 is closed. Since the potential between the drain and source of the field-effect transistor repeater 18 is zero, the voltage drop on the key 6 is also equal to

therefore, the discharge of capacitor 9 through switch 6 is minimal, which improves the accuracy of the device when storing the maximum value of the input signal.

Claims (2)

1.Volgin L.I. Measuring converters of alternating voltage to constant. M., “Soviet Radio 1977, p. 189. 2. Author's certificate of SS (ZR No. 639022, cl. .G 11 C 27/00, 1977 (prototype).