SU834833A1 - Flip-flop - Google Patents

Description

(54) TRIGGER

one

The invention relates to a pulse technique and can be used in computing devices.

Known trigger, made on the device with the S-shaped current-voltage characteristic 1.

A disadvantage of the known device is the control complexity, which consists in the necessity of radiopolar pulses.

A trigger is known that contains a semiconductor device with an S-shaped volt-ampere characteristic, the first pin of which is connected via a resistor to the power bus, the second to the common bus and the control lead through the capacitor to the input bus 2.

To control the operation of the trigger, pulses of one polarity are required, but the presence of the inductive and capacitive components of the impedance of the device with an S-shaped characteristic is used.

The disadvantages of this method are the difficulty of control and low speed due to the use of components

impedance device with an S-shaped characteristic.

The purpose of the invention is to increase speed and simplify management.

The goal is achieved by the fact that in a trigger containing a semiconductor device with an S-shaped volt-ampere characteristic, the first output of which is connected via a resistor to the first power bus, the second to a common bus, and the control output through a capacitor

o a busbar as a semiconductor device with an S-shaped current-voltage characteristic uses a bipolar pnp type transistor, the collector, the emitter and base of which are respectively the first, second and control pins

5 semiconductor device and p-channel MOS transistor, the source of which is the third output of the semiconductor device and through the second resistor is connected to the second power bus, and the gate and drain are connected respectively to the collector and base of the pn-type transistor.

The drawing shows an electrical schematic diagram of a trigger.

The trigger contains a collector, an emitter and a base of a bipolar transistor 1 of the pn type, connected respectively through a resistor 2 to the first, power supply bus 3, to a common bus 4 and through a capacitor .5 to the input bus 6. Source:; p channel MOS transistor 7 through a resistor 8 is connected to the second power supply bus 9, and its gate and drain are connected respectively to the collector and the base of transistor 1.

The transistors I and 7 form a four-pin semiconductor device 10.

The device works in the following way.

If transistor 1 is closed, then when a positive polarity pulse arrives, it opens. The magnitude of the voltage at the collector junction, and consequently at the gate of transistor 7, also decreases, which causes current to flow through the transistor 7 into the base of transistor 1. An avalanche-like process of the transition of transistors 1 and 7 to the open state develops. When the next positive polarity pulse arrives, transistor 1 closes, since an increase in potential at the drain of transistor 7 causes a decrease in the current flowing through it. This leads to an increase in voltage at the collector junction of transistor 1, which causes a decrease in the current flowing through transistor 7. An avalanche-like process of turning off transistors 1 and 7 develops.

Due to the avalanche-like process of trigger transition from one steady state to another, high speed is achieved.

The capacitance of the capacitor 5 does not affect the trigger mode of the device, therefore, the management of the proposed trigger is simplified.

Claims (2)

1.Olsevich A.E.- and others. Two-base dilda in automation. M., “Energy; 1972, with. 46, fig. 32. 2. USSR author's certificate number 341144, cl. H 03 K 3/12, 1972.