SU794767A1 - Binary signal demodulating device - Google Patents

Description

thawing blocks 5. adders 6, the first additional adder 7 and multipliers 8; counter 9, shift register 10, the second additional adder 11, the discriminator 12 of the signal level, the key 13, the relay 14. The device operates as follows. The signal from the output of the communication channel enters the input of block 1. Here the signal undergoes a one-to-one linear transformation such that each segment of the input signal with duration T corresponds to a set of numbers (component readings) that arrive at the inputs of blocks 2 in the form of voltages constant on the interval T and interchangeable at the boundary between the intervals. In the case of a video signal, block 1 is a device for sampling and storing them for time T, and in the case of a radio signal it must contain two synchronous detectors operating in quadrature and two devices for sampling samples. In both cases, the number of outputs of block 1 is equal to 2F T. Line 3 is a discrete-analog delay line, in all taps of which a simultaneous change of signal samples occurs at the boundary between adjacent clock dips. Thus, 6bar | ok, during the interval YI at the disposal of the demodulator, M samples (vector) of the input signal at the M outputs of the delay line - and M samples of the impulse response of the channel at M outputs T of the unit 4, where M is integer the number characterizing the time of dissipation Ts and equal to the number of outputs of the delay line, as well as the number of memory cells in the channel impulse response estimator. Denote X g, k - the signal readout on the interval T in the k-OM line taps (k 1, 2, ..., M); q / - / -I channel response countdown (, 2, ..., M); a g is the sign of the {-and information parcel (a; ± 1); we have Xg, k a; + k-1 qi + ar + k-2 s (2 + ... + hch. "—m Yam + UK x , - ,, a, -, к-е q, + and к, (1) where x; {x, -, Ki is the signal vector; and к is a disturbance. There is a count of taps in the delay line ve / dets from right to left. From (1) it follows that in each tap of the delay line there is a signal component, due to the desired sign a,. For example, in the "k tap such a component is: a, q ,; (2) The task of the proposed device is in order to choose one of two values a, which will satisfy the entire cstems p with the best (in the sense of the chosen criterion) images (1) in all components of the received signal. This problem is solved in the following pigment. Considering q / Izvstytym exactly, all possible combinations of the subsequent symbols ay + / (j 0,1, .., Ml) are sorted out, assuming that The signs of the previous symbols have already been made with certainty. For each set a ((+ /) g in accordance with (1), but without interference, Xg, k, g are calculated for all components of the signal (r-number of the set). The set a (r + /) r, corresponding to Xj, closest to X / is fixed. The measure of proximity is established with the help of some non-linear functional d of the difference (Xyy-X). In the simplest case, this measure can be the geometrical distance in Euclidean space of ordered signal samples. After a set of characters has been found, which corresponds to the minimum dir, only the sought-for siak is kept from this set, which arrives at the exit, as the final decision. On the next (1t1) p. clock interval a; it is considered already known, and the signs ag + / + 1 are again searched, in order to detect the minimum di-n / d (Xr-yr - Xg + 1) and the corresponding sign ai + i, and so on. The described procedure of operation can be characterized as signal processing as a whole on the MT scattering interval with element-wise decision. In block 4, the impulse response of the channel is estimated in the form of samples of a given component of this reaction. In the case where test pulses are present in the received signal, protected on both sides by passive guard intervals, unit 4 is a device for sampling samples and distributing them into separate memory cells, the number of which is M. Blocks 5 and output sample subtraction X; of the variants of the expected signal X (, g, generated by the matrix of multipliers 8 and adders 6. In multipliers 8, the impulse response counts q are multiplied by i ± j ± 1, therefore, the multipliers 8 are the keys that feed the response q, s the outputs of block 4 to the inputs of adders 6. The control of non-multipliers 8 is made from counter 9 and from register 10. Both structurally and functionally adders 6 multipliers 8 form a matrix, during which the vector (column) acts

samples of the reaction G jq /}, and at the output a vector of the expected signal X (, g

X ,,. . (3)

The matrix A is formed by binary coefficients a / + /, and its upper triangular part is composed of the well-known sign coefficients (a- / j,) obtained from register 10 and constant on the interval T; the lower triangular part is made up of unknown characters (, j 1) received from counter 9 and fully enumerated on interval T; the main diagonal is formed by the desired signed coefficient a /, received from counter 9 and receiving two values during T: during one half of the interval a / +1, the other - a / -1, no matter in what sequence. The counter 9 must, within T, issue one after the other all 2 combinations (sets) of the sign coefficients a {r + y1g indifferently in what sequence.

Counter 9 may be; for example, an M-bit binary counter, set at a frequency f. During the counting at the outputs of the counter, all 2-possible combinations of binary characters will take place one after the other. If the counter is made on triggers, it is convenient to use the anti-phase outputs of the triggers as control signals for switching multipliers 8.

From the outputs of blocks 5 to the inputs of the adder 7, the differences of the form X {, k, g - X (, k, /, in the adder 7 are added, the squares of these differences are added and the square of the norm of the difference between the expected and incoming signals is obtained.

d2 (X, ..- X,) || Xi, .- X; || 2 i (X ,, K.

-hg, k) 2. (4)

When another metric is selected in the sample space in adder 7, a different non-linear operation is performed, for example, the addition of the moduli of differences

d (xi, r-x,) | х1г, к.г-хг, к |. (5)

The choice of metrics is determined primarily by the statistics of additive noise in the channel. With white Gaussian noise, the maximum likelihood criterion leads to the rule (4). In the presence of impulse noise, the metric may be optimal.

d {Xi, r-Xi) Mach | Xr, k, r-Hlk |. (6)

In adder 7, the operations associated with one signal component are completed. In other blocks 2, the total number of which is n 2FT, exactly such

same operations on the other components of the signal. Block 2 is exactly the same and interchangeable. They can be considered as independent branches of diversity when receiving the same information.

For optimal coherent folding of these branches, it is sufficient to add the first additional outputs.

adders 7 in adder 11, and consider the result of the second addition as the norm of the common pM-dimensional vector of the difference of the expected z, -, g and channel z; signals. Such an addition is legitimate with metrics (4) and (5). With metric (6), instead of the second additional adder 11, a device that implements (6) should be used again.

The discriminator 12 must determine the moment when the next search step 9 of the counter 9 leads to the appearance of a signal

Z 1, g is the least different from the channel signal z, -, i.e., to give a pulse at the moment when the output of the adder 11 shows the minimum result from the beginning of the current interval T. The discriminator 12 may, for example, contain a peak voltage drop detector and a capacitor discharge current indicator. At the beginning of the interval T, the capacitor is charged to the highest possible voltage. As the sequencer adds the next summation results, the voltage on the capacitor decreases to the next level, if it is lower than the residual voltage on the previous stage, or retains its previous value, if

equal to or above residual stress. The capacitor discharge current indicator gives a pulse each time a capacitor is discharged, at least by a small amount of voltage. Thus, by the end of the interval T there is a voltage on the capacitor that is numerically equal to the minimum distance between the input and r-th expected signal, and the output of the discriminator 12 has one or several pulses occurring at times corresponding to more

x

“Close approximation z;, r to Z, -. The last of these pulses corresponds to the most intense of z /, r. Each time the pulse appears at the output of the discriminator 12, the key 13 is opened, and the value a, which at the moment of the occurrence of the next

a pulse occurs at the main output of counter 9, is recorded in relay 14. During T, relay 14 will receive conflicting orders, but by the end of T, relay 14 will have that value

aj, which corresponds most closely to My Z (, r to Z (-. Thus, the logic of the device is such that by the end of the i-th interval at the input of register 10 there is a symbol a; is the first of the combination (3; + /) to the expected

Z g, g, closest to z. At the end of the i-ro interval T, register 10 will overwrite this value a.1 in its first cell, and for the next (iH-l) -M interval, the newly registered a / will “work as an already known character; other register cells will also receive new content from the neighboring cells on the left; at the input and outputs of line 3, similar samples will be updated; discriminator 12 will be returned to the initial state. These operations are carried out synchronously by a command from the control unit. The rhythm of operation of unit 4 is subject to a cyclic period (for example, the moments of arrival of test pulses).

The remaining blocks do not contain memory elements, are inertia-free and do not need to be controlled.

The output of the entire proposed device is the first register register 10.

Thus, the advantage of the proposed device over similar technical solutions is to increase the reliability of demodulation while maintaining the relative simplicity of the device, to reduce the signal delay in the demodulator, to eliminate fluctuations in the fronts of the output discrete signal, which could be from the beam to the beam, and in this connection, in the absence of errors of the type of shift, in the expansion of the permissible interval of out of sync - and, as a result, in increasing the reliability and viability of the entire communication system, the post oennoy on the basis of the proposed device.

Claims (1)

1. USSR author's certificate No. 341170, cl. H 04 B 15/00, 1970 (prototype).