SU790004A1 - Synchronizing unit for reading-out devices - Google Patents

Description

The invention relates to computer technology and can be used in coordinate panels for inputting information and reading devices.

A known unit containing 5 pulse generator, a counter connected to decoders, pulse distributor .11].

However, this unit has limited synchronization capabilities 1C ..

A known unit containing a pulse generator connected to a counter, the outputs of which are connected to decoders, a pulse distributor-J5 ow [2).

However, such a unit has low speed with limited synchronization capabilities.

Closest to the invention 20 is a block containing a button. a pulse generator, the first output of which is connected to the first input of the counter, the first or third outputs of which are connected respectively to the first 25 and third decoders, the second output of the pulse generator is connected to the synchronization input of the first decoder, outputs 0, 1, 2, 3 of the second and the third decoders 30 are connected to one control input of the first pulse distributor, the other control inputs of which are connected to the first inputs of the external control, and the synchronization input is connected to the output 1 of the first decoder.

However, such a unit has low speed and limited synchronization capabilities.

The purpose of the invention is to increase quickly · the action of the block.

This goal is achieved by the fact that in a known unit [3], containing a control unit, a pulse generator, the first output of which is connected to the first input of the counter, the first, second and third outputs of which are connected to the inputs of the first, second and third decoders, respectively, the second output of the generator pulses connected to the synchronization input of the first decoder, the first outputs of the second and third decoders are connected to one of the inputs of the first pulse distributor, the other inputs of which are connected to the first inputs of the block, and a third - input - to one of the outputs of the first decoder, the fourth and fifth decoders, a comparison node, three triggers, a second pulse distributor and a switch are introduced, the second and third outputs of the counter connected to the first inputs of the comparison node, the fourth and fifth outputs to the entrances of the fourth and fifth deshiFrato-; Accordingly, the first output of the fifth decoder is connected to the blocking input of the fourth decoder, the first output of which is connected to the third blocking input, its decoder, the first output of the first decoder, the torus is connected to the first input of setting 0 of the first trigger, the first inputs of setting I ^th . the second and third triggers to the synchronization input of the second pulse distributor, the second output of the first decoder is connected to the first input of the 1 ”installation of the first trigger, to the second inputs of the 1” installation of the second and third triggers and to the first input of the second pulse distributor, the second inputs of which are connected to the first outputs of the second decoder, the first outputs of the third decoder are connected to the third input of installation 0 of the first trigger, the second outputs to the third inputs of installation 1 of the second and third triggers, 'third you one - with the third input of the second distributor ·, the second outputs of the fourth decoder are connected to the first 'inputs of the switch, the output of the comparison node is connected to the second input of installation 1 of the first trigger, the third input of installation 1 of which is connected to the output of the switch, the outputs of the control unit are connected to the input of setting 0 and the fourth input of setting 1 of the second trigger, the inverse output of which is connected to the input of setting 0 of the third trigger, and the direct output to the fourth input of setting 1 of the third trigger and to one blocking input th pulse distributor, the other locking input coupled to an inverted output of the third, the trigger inputs rye comparison node connected to the inputs of the switch unit.

The second or fourth entrance! the controls are connected respectively to the second inputs of the comparison circuit, switch, and counter.

In FIG. 1 shows the blockade structure in FIG. 2, 3, and 4 are time diagrams of the operation of decoders.

The synchronization block includes a pulse generator 1, a counter 2, decoders 3,4,5,6,7, comparison node 8 ri, triggers 9,10,11, pulse distributors 12 and 13, switch 14, inverters 15, 16, switch

17. The positions 18g37 indicate the connections between the nodes, 38g41 - external control inputs. Inverters 15; 16 and a switch 17 are integrated in, a control unit 42.

\ 5 second count

45external

The synchronization unit operates as follows.

The generator 1 continuously affects the counting input of the counter 2, the code of which is supplied to the inputs of the decoders 3,4,5,6,7. The signal at the output of the decoder 7 determines the cycle of operation of the synchronization unit. Everyone's time. ^ of the work cycle depends on the number of high bits of the counter 2 connected to the decoder 7 using external control signals at the inputs 41. The signals at the outputs 26,27,2-8 of the decoder 6 determine the main clock cycles in each cycle of the synchronization unit. The decoders 3,4 work in each cycle, and the decoder 5 - only in the first cycle. The distributor only works in the first cycle when the signals appear at the outputs 26, 27,28,29 of the decoder 5. The polling pulses from the outputs of the distributor 12 are continuously fed to the system of coding elements of the coordinate panel for entering information not shown in the diagram. The dispenser 13 operates once in the first cycle only when the switch button 17 is pressed. The dispenser is operated once by means of triggers 10.11 and a signal at the output 32 of the decoder 5. Trigger 9 is set to the position '' 1 ^{1 1} under the influence of the executive signal at the output 18 ^ the decoder 3 in the presence of enabling signals at the outputs of the comparison node 8 and the switch 14. The switch 14 passes signals from the outputs 35 or 36 of the decoder 6 only when the corresponding external control signals arrive at inputs 40. In the second At the input to the setup 1 input of trigger 9, the signal passes from the output 35 of the decoder b, however, trigger 9 only works when the code at the outputs of the third and seventh bits of counter 2 is equal to the code received at inputs 39. In this case, the output of comparison node 8 is generated additional enable signal for setting 1 trigger 9. Time -. trigger actuation trigger 9 upon receipt of it. The signal input from the output 35 of the decoder b depends on the number of pulses at the output 19 of the decoder 3, developed until the node 8 compares the code of the counter 2 and the external binary code at the inputs 39.

The introduction of new nodes and connections into the device increases its speed and expands the capabilities of synchronization.

$ 0

Claims (3)

1. Author's certificate of the USSR 386415, cl. G 06 K 11/00, 1973. 2. Authors certificate USSR-. 482805, class G 01 S 7/00, 1976. 3. Authors certificate of the USSR to 516097, cl. G 11 of 7/00, 1976 prototype}. 4; 0JLJ1JLJLJU1J JOLJLJ1J 4 -, / -TLJIJIJIJLJLJIJUOIJLJ 4: 2-nJT-JLJlJlJLJLJIJlJUl 4: J5-0-P