SU758564A1

SU758564A1 - Vertical synchronization device

Info

Publication number: SU758564A1
Application number: SU782576700A
Authority: SU
Inventors: Яков Давыдович Хацкелевич; Тамара Федоровна Дубова; Андрей Александрович Егоров
Original assignee: Предприятие П/Я Г-4149
Priority date: 1978-02-09
Filing date: 1978-02-09
Publication date: 1980-08-23

Description

Изобретение относитс к радиотехнике и может быть использовано в системах св зи. Известно устройство кадровой синхронизаи 1И содержащее регистр сдвига, выходы которого соединены с соответствующей первой грутшой входов коррел тора пр мого кода и коррел тора обратного кода, вторые группы входов которых соединены соответственно с выходами блока пам ти кода маркера, при этом выход коррел тора пр мого кода соединен с первым входом первого элемента ИЛИ, второй вход ко торого соединен с выходом коррел тора обратного кода, а выход первого элемента ИЛИ соединен с первыми входами блока подтверждени маркера и блока обнаружени ложного мар кера, причем ко второму; входу блока обнаружени ложного маркера подключен выход первого элемента НЕ, вход которого соединен с выходом формировател кадрового интервала и со вторым входом блока подтверждени мар кера 1J. Однако в таком устройстве особенно при низких отнощени х сишал/щум на бит передаваемой информаини из-за сбоев происходит потер информации. К сбо м приводит пропуск маркера или ложное его определшие на этапе вхождени в синхронизм, переход в ложное состо ние синхронизации на этапе текущего приема информацин. Йель изобретени - повышение помехоустойчивости вьщелши С1шхронизирун щего маркера. Это достигаетс тем, что в устройство кадровой синхронизации, содержащее регистр сдвига , выходы которого соединены с соответствующей первой группой входов коррел тора пр мого кода и коррел тора обратного кода, вторые группы входов которых соединены соответственно с выходами блока пам ти кода маркера , при этом выход коррел тора пр мого кода соединен с первым входом первого элемента ИЛИ, второй вход которого соединен с выходом коррел тора обратного кода, а выход первого элемента ИЛИ соединен с первыми входами блока подтверждени маркера и блока обнаружени ложного маркера, причем ко второму входу блока обнаружени ложного маркера подключен выход первого элемента НЕ,The invention relates to radio engineering and can be used in communication systems. A device for frame synchronization 1I is known, which contains a shift register, the outputs of which are connected to the corresponding first group of inputs of the forward code correlator and the feedback code correlator, the second groups of inputs of which are connected respectively to the outputs of the memory block of the marker code, while the output of the direct code correlator is connected to the first input of the first OR element, the second input of which is connected to the output of the feedback code correlator, and the output of the first OR element is connected to the first inputs of the marker confirmation block and the detection block March ker false voltage, wherein the second; the input of the false marker detection unit is connected to the output of the first element NOT, the input of which is connected to the output of the frame interval shaper and to the second input of the marker confirmation block 1J. However, in such a device, especially at low rates of Sishal / sound per bit of information transmitted, due to failures, information is lost. A missing marker or a false one that determines it at the stage of entering synchronization, the transition to a false synchronization state at the stage of current reception of information, leads to failure. Yale of the invention - improving the noise immunity of the S1 synchronizing marker. This is achieved in that the frame synchronization device containing the shift register, the outputs of which are connected to the corresponding first group of inputs of the forward code correlator and the return code correlator, the second groups of inputs of which are connected respectively to the outputs of the memory block of the marker code, while the output the forward code correlator is connected to the first input of the first OR element, the second input of which is connected to the output of the feedback code correlator, and the output of the first OR element is connected to the first inputs of the confirmation block the arker and the false marker detection unit, and the output of the first element HE is connected to the second input of the false marker detection unit,

вход которого соединен с выходом формировател кадрового интервала и со вторым входом блока подтверждени маркера, введены блок обнаружени пропуска маркера, первый, второй и третий блоки формировани весовых коэффициентов , второй, третий и четвертый элемент НЕ, первый, второй, третий и четвертый элеметт И, второй и третий элементы ИЛИ, а также блок прин ти решений и сумматор-накопитель , при этом выход первого элемента ИЛИ соед1тен с первым входом блока обнаружени пропуска маркера через второй элемент НЕ, а второй вход блока обнаружени пропуска маркера соединен со входом первого элемента НЕ, со вторым входом блока подтверждени маркера и с входом формировател кадрового интервала , при этом выход блока обнаружени пропуска маркера соединен с первым входом первого элемента И, ко второму входу которого подключен выход первого блока формировани весового коэффициента, выход блока обнаружени ложного маркера соед1шен с первым входом второго элемента ИЛИ и первым входом второго элемента И, второй вход которого соединен с выходом второго блока формировани весового коэффициента, а выход блока подтвер одени маркера соединен со вторым входом второго элемента ИЛИ и с первым входом третьего элемента И, второй вход которого соединен с выходом третьего блока формировани весового коэффициента, причем выходы первого, второго и третьего элементов И соедштены соответственно с первым, вторым и третьим входами третьего элемента ИЛИ, выход которого соединен со входом блока прин ти решений через сумматор-накопитель, при этом первый выход блока прин ти решений соединен с третьим входом первого элемента И через третий элемент НЕ, а второй выход блока прин ти решений соединен со входами установки порогов срабатывани коррел тора пр мого кода и коррел тора обратного кода, а также со входом четвертого элемента НЕ и со вторым входом четвертого элемента И, при это выход четвертого элемента Iffi соединен с треть им входом третьего элемента И, второй вход четвертого элемента И соединен с выходом второго элемента ИЛИ, причем выход четвертого элемента И соединен со входом формировател кадрового интервала. На чертеже приведена структурна схема устройства кадровой синхронизации. Устройство содержит регистр 1 сдвига с фик сированными отводами, коррел тор 2 пр мого кода, коррел тор 3 обратного кода, блок 4 пам ти кода маркера, элемент ИЛИ 5, блок 6 обнаружени ложного маркера, блок 7 подтверждени маркера, формирователь 8 кадрового шпервала, элемент НЕ 9, блок 10 обнаружени пропуска маркера, элемент НЕ 11, элементы И 12, 13 и 14, блоки 15, 16 и 17 формировани весовых коэффициентов, элемент ИЛИ 18, сумматор-накопитель 19, блок 20 прин ти решений, элементы НЕ 21, 22, элемент И 23, элемент ИЛИ 24.the input of which is connected to the output of the frame interval imager and to the second input of the marker confirmation block, a marker skip detection block, the first, second and third weighting factors are introduced, the second, third and fourth elements are NOT, the first, second, third and fourth elemett I, the second and third elements OR, as well as the decision block and the accumulator, the output of the first element OR are connected to the first input of the marker skip detection unit through the second element NOT, and the second input of the block is detected the marker pass is connected to the input of the first element NOT, to the second input of the marker confirmation block and to the input of the frame interval shaper, while the output of the marker skip detecting block is connected to the first input of the first And element, to the second input of which the output of the first weighting factor forming block is connected the false marker detection unit is connected to the first input of the second OR element and the first input of the second element AND, the second input of which is connected to the output of the second weight cell forming unit the output, and the output of the marker confirmation block is connected to the second input of the second OR element and to the first input of the third element AND, the second input of which is connected to the output of the third weighting factor forming unit, the outputs of the first, second and third elements connecting to the first, second and the third inputs of the third element OR, the output of which is connected to the input of the decision block through the accumulator, the first output of the decision block is connected to the third input of the first element And The third element is NOT, and the second output of the decision block is connected to the inputs of setting the thresholds for the correlator of the forward code and the correlator of the reverse code, as well as to the input of the fourth element NOT and to the second input of the fourth element I, with the output of the fourth element Iffi connected to the third input of the third element And the second input of the fourth element And is connected to the output of the second element OR, and the output of the fourth element And is connected to the input of the imaging unit of the frame interval. The drawing shows a block diagram of the device frame synchronization. The device contains a shift register 1 with fixed taps, a forward code correlator 2, a return code correlator 3, a marker code memory block 4, an OR 5 element, a spurious marker detection block 6, a marker confirmation block 7, a HE element 9, a marker skip detection unit 10, a HE element 11, AND elements 12, 13 and 14, weighting factor formation blocks 15, 16 and 17, an OR element 18, an accumulator 19, a decision block 20, a HE element 21 , 22, element AND 23, element OR 24.

Устройство кадровой синхрониэации работает следуюшим образом.The frame synchronization device works as follows.

Claims

The input sial is fed to the input of the shift register 1 with fixed taps, which are connected to the inputs of the correlators 2 and 3 of the forward and reverse code. When the signal exceeds the threshold in the correlator and depending on the correlation sign at the output of one of the correlators (second or third), the marker code is received, which through the element OR 5 enters the inputs of the false marker detection unit 6 and the marker confirmation block 7 directly, and the block 10 is detected by the passage of the marker through the element NOT 11. From the output of the imaging unit 8 of the frame interval, the pulse of the synchronizing marker goes to the second inputs of the blocks 7 and 10 directly and to the block 6 through the element HE 9. When the signal is extracted, the block 6 m it is supplied to AND gate 12, whose second input soedshen with block 15 forming weight coefficient. When the signal is selected by the block 10, it is fed to the element I 13, the second input of which is connected to the block 16 for generating weights. When the signal is extracted by the marker confirmation block 7, it is fed to the element I 14, the second input of which is connected to the block 17 for forming weight coefficients. The signals from the outputs of the elements And 12, 13, 14 through the element OR 18 arrive at the accumulator 19, where the algebraic summation of the incoming sigals with the already existing sum occurs. If summation is less than or equal to O in accumulator-accumulator 19, then in the correlators 2 or 3 a minimum threshold is set: Pn - ki, where n is the number of marker symbols, and k, is the number of correctable errors. At the same time, the prohibition through the element HE 21 on the element AND 13, which transmits a pulse from the marker skip detection unit 10, enters, and the element 23 opens, allowing the phasing of the frame interval 8 to the in-phase state with the pulses allocated either by block 6 or by block 7 and passing through the element OR 24 to the second input of the element AND 23. If in the accumulator-accumulator 19 the sum is greater than or equal to 1, the threshold RI increases, the prohibition simultaneously enters through the element NOT 22 on the element AND 14. The output of the imaging unit 8 of the frame interval is output device. Thus, in the proposed frame synchronization device, by introducing a controllable decision threshold in the correlators and imparting different weights to such events as the marker skip, its correct determination and its false determination, as well as imparting to individual events at boundary conditions zero weight accumulator accumulator (disregard of weights) increases the efficiency of the frame synchronization system, defined as the reciprocal of the probability of information loss, by one to two orders of magnitude. The invention of the frame synchronization device containing the shift register, the outputs of which are connected to the corresponding first group of inputs of the forward code correlator and the feedback code correlator, the second groups of inputs of which are connected respectively to the outputs of the marker code memory, code is connected to the first input of the first OR element, the second input of which is connected to the output of the feedback code correlator, and the output of the first OR element is connected to the first inputs of the marker confirmation block and the false marker detection unit, npif the output of the first NOT element is connected to the second input of the false marker detection unit, the input of which is connected to the output of the frame interval generator and to the second input of the marker confirmation block, which, in order to improve the noise immunity, the synchronization marker, the marker skip detection block is entered, the first, second and third blocks of the formation of weighting factors, the second, third and fourth elements are NOT, the first, second, third and fourth elements are AND , the second and third elements OR, as well as the decision block and the accumulator, the output of the first element OR is connected to the first input of the skip marker skip detection unit, the second element is NOT, and the second input of the skip detection unit is connected to the input of the first element NOT, with the second input of the marker confirmation block and with the input of the frame interval shaper, while the output of the marker skip detection block is connected to the first input of the first element I, the second input of which is connected to the output of the first forming unit in coefficient, the output of the false marker detection unit is connected to the first input of the second OR element and the first input of the second element AND, the second input of which is connected to the output l of the second block for forming the weight coefficient, and the output of the marker confirmation block is connected to the second input of the second OR element with the first input of the third element And, the second input of which is connected to the output of the third block of the formation of the weighting factor, and the outputs of the first, second and third elements And are connected respectively to the first, in The third and third inputs of the OR element, the output of which is connected to the input of the decision block through an accumulator, the first output of the decision block is connected to the third input of the first element I. Through the third element is NOT, and the second output of the decision block connected to the inputs of setting the thresholds for the correlator of the forward code and the correlator of the reverse code, as well as to the input of the fourth element NOT and to the second input of the fourth element AND, while the output of the fourth element is NOT connected to the third input of the third the second element And, the second input of the fourth element And is connected to the output of the second element OR, and the output of the fourth element AND is connected to the input of the imaging unit of the frame interval. Sources of information taken into account during the examination 1. USSR Author's Certificate No. 554639, cl. H 04 N 5/06, 1977 (prototype).