SU758543A1 - Message receiving device - Google Patents

Description

(54) DEVICE TO RECEIVE A MESSAGE

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The invention relates to a communication technology. A device for receiving messages is known, which contains in series a regenerator and a signal converter and 11os; 1 ed () w. Coupled first accumulate.), The element I, the second 1con and one terminal cell, as well as sequentially connected 1e P y decoder. , yy b.yuk, b.yuk, and peredachchik s.chuzhebpy .x. In this way, the outputs of the control panel are, respectively, G1 () dk, to the other inputs of the first accumulator, the terminal And, and the second tip 1.

However, such a device does not have the necessary reliability of reception.

The purpose of the invention is the novelty of reception reliability.

This is achieved by the fact that a first message accumulator, a serially connected regenerator and a signal converter, and a serially accumulated first accumulator, g1.1me 1t I, a second p1-11 p1 and receiving station 1, as well as pos. Successively connected decoder, reputable b.yuk, b, control, and transmitter c. already commands, this, B). go to the unit at 1 and 1, respectively, but are connected to other inputs of the first accumulator, the element And and. of the second akto 1l, 1us is entered, 1 is connected, respectively, not the same delay block, modulo two p e, emep AND - NOT. on another vkhod kotorogch)

filed) STROBIRH OllUie IMN, 1СЬ, and B) PROGRESS

connected to another input, its block, this, the input of the delay block, another input of the adder io module two, and the input of the decoder c) are connected and connected to the output of the regenerator, and the output of the converter (.sqn. 1dk, 1pc to another input of the comp.

FIG. I 1 is a structural electrical circuit of a pre-driven device; on . 2 1 detected detection OP 11BOK.

The device or reception) contains a regenerator 1, 1 transform 1 2 signal, the first one accumulate 1 3, e. 11 4, the second. 5, receiving unit ;: (i, b.yuks 7 delay. With mmator 8 for fashion, 1 st D1) a, e.1me g 11 HF. 9, decoder 10, peiiiaio niiii block II, b.yuk 12) aw ,, || 1redat ik, s.ZhebP. X.

cTp (, iicTi o d.) 6 ;;. e; 1pi iMfuiТ; 1 S. BOOKERS

Bi-pulse signals of the message encoded by the resulting test combination are input. For example, the unit elements of a test pattern are obtained by adding modulo two defined bits of all the code combinations of a message.

From the output of the regenerator 1, the recovered bi-pulse signal is fed simultaneously to the converter 2 of the signal, to the inputs of the delay unit 7, the adder 8 modulo two, decoder 10. From the output of the converter 2 of the signal to the input of the first drive 3, the information is received in binary form, recorded and stored until decisive block 11 decides on this combination.

Error detection in each combination occurs by analyzing the structure of the bi-pulse signal. The analysis is carried out using a delay unit 7, an adder 8 modulo two, and an NAND element 9. The combination shown in FIG. 2a is converted into a bi-pulse code in one of the possible ways and transmitted over the communication link.

Let “1 correspond to two pulses of the same polarity, each with duration t, and“ O - two pulses of different polarity of the same duration (see Fig. 26). To eliminate the constant component of the signal transmitted over the communication channel, the neighboring unit elements have opposite phases.

The bi-pulse signal is applied to one of the inputs of the adder 8 modulo two, to the other input comes a signal delayed by the delay unit 7 t (see Fig. 2c). From the output of the adder 8 modulo two, a signal is applied to the first input of the YNE 9 element, to the other input - gating pulses shifted by a duration equal to g / 2 from the leading front of each bi-pulse (see Fig. 2d).

If at the moment of gating from the output of the element IS-HE 9 it arrives “O, then this means that there was no distortion of the signal structure. In the absence of a structure distortion on the length of the code combination, the decisive block 11, via the control block 12, issues an information census signal from the first accumulator 3 through the AND 4 element to the second accumulator 5. If the structure of the bi-pulse signal is disturbed, then the output of the NAND 9 element appears at the time of gating "1" (see Fig. 2e), decisive block 11 outputs an erase signal and the combination is not recorded in the second drive 5.

In this way, each combination is checked for errors without adding a check bit.

Decoder 10 monitors the resulting test combination.

If at the end of the reception of all m message combinations, at least one register remains empty or an error signal appears from the output of decoder 10, then control unit 12 transmits the NO command via transmitter 13 service commands to the reverse channel.

As a result, the message is re-transmitted. When you re-receive a message, those distorted combinations that were distorted are selected from it.

on retransmission.

After all registers are filled with non-slip combinations in the accumulator and the decoder 10 does not detect errors, the command YES is issued to the transmitter 13 of the service commands.

The technical and economic efficiency of the message receiving device is to increase the reliability of the reception.

Claims (1)

Invention Formula A device for receiving messages containing, at the input, a serially connected regenerator and a signal converter and serially connected first the drive, the element And, the second drive and the receiving node, as well as serially connected decoder, decisive unit, control unit and transmitter of service commands, while the outputs of the control unit are respectively connected to other inputs of the first storage device, the element And and the second storage device, characterized in that, in order to increase the reliability of reception, serially connected delay block, modulo two modulator and AND-N, elements are introduced the other input is supplied with gating pulses, and the output is connected to another input of the decision block, while the input of the delay unit, the other input of the modulo two adder and the decoder input are combined and connected to the regenerator output, and the output of the signal converter is connected to another input of the accumulator. Sources of information taken into account in the examination 1. Elements of the theory of transfer of discrete information. Ed. A.P. Purtova. M., “Holy, 1972, p. 176 (prototype).