SU478447A1 - Device for increasing the reliability of discrete information transmission - Google Patents

Description

The first bits of the shift register with feedback, on the receiving side, informational, and the test bits of the feedback register register are connected to the inputs of the shift number register, and the outputs of the data bits to the second inputs of the decision unit. The invention is illustrated in the drawings. FIG. 1 shows the structural electrical circuit of the transmitting part of the device; in fig. 2 - receiving part. A device for increasing the reliability of transmitting discrete information coI stands out from its transmitting and receiving part. The transmitting part contains an input node 1, a temporary storage 2, an element AND 3, an element OR 4, a control unit 5, a shift register with feedback 6, an output node 7, a generator of pulse bursts 8, a register of the number of shifts 9, which stores the register 1O. The receiving part contains the input node 11, the shift register with the coupling 12, the generator of the pulse train 13, the register of the number of shifts 14, the decisive block 15, the control unit 16, the temporary storage 17, the storage register 18, | the output node 19. The device works in the following way . In the transmitting part, an information combination of k symbols from the information source is fed through the input node 1 to the temporary memory 2 and to the register with feedback 6 through the OR element if the device is not in query mode. If the device is in the request mode, then repeated information combinations come from temporary accumulator 2, through one of the AND elements opened by block 5, and yes more easily through the OR 4 element to register 6. At the same time, block 5 blocks input node 1. B Register 6 attaches to the information combination f check characters from register 10, which are a certain part of the information characters of the previous combination. A certain part of the characters of this information combination is fed into register 1O for redundant coding of the subsequent information combination. The received initial block of characters is sent to the register of the number of shifts 9, for randomly converting the subsequent block in reg 1p 6 under the influence of push pulses from pulse generator 8, the number of which is equal to the numerical value of the combination of the previous original block. At the end of the progress, the received code block enters the Communication channel through the output node 7 by the signal from block 5. In the receiving part, the code block from the communication channel enters through the input node 11 into register 12 in the absence of blocking from block 16 in the request mode. In register 12, the code block is subjected to inverse random transformation under the influence of pushing pulses from pulse generator 13, I being the same number as the numerical value of the combination of the previous received block after the conversion. The resulting block enters the register of the number of shifts 14 in order to set the number of push pulses to convert the subsequent code block. Check symbols are sent to decision block 15 for comparison with a certain part of information symbols from predecessor1: its block coming from register 8. If they do not match, the device goes into request mode with the information output to the consumer blocked through output node 19 and requesting the set number of previous blocks and blocks caught under lock. When these characters match from the temporary accumulator 17 through the output node 19, the information received ten blocks earlier is delivered to the consumer, and an information combination from the newly received block is fed into the temporary accumulator 17. A certain part of the information characters goes to register 18 for comparison with the check symbols of the subsequent block. If in block 16 during the transmission of a certain number of N blocks the number of mismatch signals from a decisive block 15 exceeded a certain value, then block 16 outputs a signal to the temporary accumulator 17, which provides information consumer with a higher delay (ten), and sends a signal switching to the transmitting part in block 5 about a similar change in the number of requested blocks that orye pg- avalis to the block in which the error is detected. The subject matter of the invention. The device is more reliable in transmitting discrete information. I containing on the transmitting side an inlet unit connected to a temporary accumulator, a register of the number of shifts, the output of which through the generator of pulse packets is connected to the push-pull forwarding input of the shift register, whose output is connected to the output node, the control unit with the receiver dripping connection, connected to the inputs of the temporary accumulator, input and output nodes, and on the receiving side - the input node connected to the input of the shift register with feedback, to the pushing input. which is connected to the register of the number of shifts through the fi} pulse burst count, the outputs of the information transducer.) x shift register bits are connected to the output node via a temporary storage device, and the outputs of the check bits are connected to the input of the decision block, the output of which is connected to the input of the control unit, connected to the entrances of the temporary accumulator, the input and output intrusion units, and, in order to maintain the required reliability when changing the interference level in the communication channel, on the transmitting side The accumulator is connected to the inputs of the corresponding I-elements, the second inputs of which are connected to the outputs of the control unit, and the outputs of the elements AND and the output of the input node are connected to the inputs of the shift register with feedback, the outputs of the information and check bits of which are connected to the inputs the register of the number of shifts, and the outputs of the ilformat, of the discharge bits are additionally connected through the auxiliary register of memory to the inputs of the first bits of the shift register with the reverse, on the receiving CTOpoiie there are outputs The shift and shift bits of the shift register are connected to the inputs of the register of the number of shifts, and the outputs of the information bits to the second inputs of the decision unit. Request switching to the communication channel

Request switch

From the channel svlzi.

15

one

I I I

18

one

  If

17

:} To consumer

IS

insormations.