SU748560A1 - Timer - Google Patents

Description

(54) TIME RELAY

one

The invention relates to a semiconductor time relay using the electrical principle of a time delay with a storage capacitor, and can be used in electronic devices that require time delays of increased duration and noise immunity.

Currently, unijunction transistors with a stable switching level are used to build time relays. . The timing element in such devices is a circuit that operates to charge or recharge a capacitor. The output of these devices is a short pulse with steep edges.

A time relay is known that contains the time I specify an RC circuit, a null organ on a single junction transistor, and a thyristor output stage I.

The disadvantage of such a burner is a low noise immunity with a large exposure of the burden.

A time relay is known in which a generator is additionally introduced at a unijunction transistor, which serves to periodically excite a null organ, which improves the noise immunity of the relay {21.

However, this complicates the circuit, but does not provide for obtaining a sufficiently long specific time lag for I m of the capacitance used during the time of the RC circuit.

Using the method of accumulation of pulses of high porosity allows us to provide a significant increase in the specific time delay and improve the noise tolerance of the relay.

The closest to the invention to the technical essence is a time relay containing a pulse / pulse generator with time defining an RC circuit and a single junction transistor connected by an emitter to an RC circuit, and a pulse accumulator with a storage capacitor and a single junction transistor master oscillator. The transistor of the pulse accumulator is connected to

20 control electrode of the output thyristor J3J.

Claims (3)

The disadvantage of this time relay is that the pulse to the drive is transmitted from a resistor in the first base circuit of the master oscillator connected to the negative power supply bus, which does not allow using all the power supply voltage to charge the pulse storage capacitor. Another significant disadvantage of the time relay is its low noise immunity. The purpose of the invention is to increase the noise immunity and increase the specific time delay of the relay. Delivered is achieved by the fact that a time relay containing a pulse generator, made on a single junction transistor, a pulse accumulator, made on a single junction transistor with a storage capacitor and connected to the executive switch element of the single junction transistor of the pulse generator, a power source, an electronic switch, whose input is connected, is additionally entered to the second base of the unijunction transistor geyrator of pulses and through a resistor; A positive power supply bus and an output through the diode and a resistor are connected to the emitter of a single junction transistor of a pulse drive, and a storage capacitor is connected between the emitter of a single junction transistor of a pulse drive and a first base of a single junction transistor of a pulse generator. The schematic diagram of the proposed time relay is shown. The time relay consists of the master oscillator 1, which consists of the RC master circuit time (resistor 2, capacitor 3) and a single junction transistor 4 with resistor 5 in the second base circuit and generator 6 in the first base circuit. From the pulse generator 1, through the capacitor 7, the pulses go to the base of the transistor 8 of the transistor switch 9 and then from the collector of the transistor 8 through the diode 10 to the RC chain (resistor 11, capacitor 12) of the drive of 13 pulses. The positive plate of the capacitor 12 is connected to the emitter of the single junction transistor 14, and its negative plate is connected to the first base of the single junction transistor 4. The single junction transistor 14 has a resistor 16 in the second base circuit and a resistor 16 in the first base circuit. The first single transistor base of the transistor 14 connections to the control electrode of the executive thyristor 17. In the anode circuit of the thyristor 17, a resistor 18 is connected, from which the output signal is taken. The collector of transistor 8 is connected via a resistor 19 to a negative power supply line. When the circuit returns to its original state with key 20, the power supply circuit of the thyristor 17 and the second base of transistor 14 is cut off, and the time of the driving RC circuit is simultaneously bounded by resistor 21. The scheme works as follows. The master oscillator I pulses a large borehole, the switching frequency of which is determined by the ratio of the values of resistor 2 and capacitor 3. During the existence of the pulse, the anode of diode 10 is connected to the positive power supply bus using a transistor switch 9. The pulses through diode 10 and resistor I charge capacitor 12. When the voltage across the capacitor 12 reaches the opening threshold of the transistor 14, a pulse appears on the resistor | b, which opens the executive thyristor, and on the resistor 18 an output signal appears. Since the negative plate of the capacitor 12 is connected to a resistor 6 in the first base circuit of transistor 4, the pulse voltage across the resistor 6 at the moment of switching on the transistor switch 9 is added to the voltage accumulated. the capacitor 12, which ensures a clear operation of the time relay when the voltage on the capacitor 2 approaches the opening threshold of the single transition transistor 14. Since the pulse on the resistor 6 considerably exceeds all types of interference signals, then the interference relay cannot have an impact. The time relay is triggered by key 20 by closing the thyristor anode 17 AND the second base circuit of the transistor 14 with a positive power supply bus. The time relay is turned off by switching the key 20 to the resistor 21. The pulse generator continues to work, but with a higher frequency, and the transistor 14 is open, as a result of which the capacitor 12 is recharged in the opposite direction, which increases the delay time, the stability of its operation and reduces the ready time relay. The switching period of the oscillator I of the driving pulses when the time is off can be made arbitrarily long depending on the choice of the value of the resistor 21. The presence of a resistor 19 in the collector circuit of transistor 8 eliminates the influence of the leakage current of the transistor on the charge of the storage capacitor. In this case, all elements of the circuit are in working condition and from the moment of switching on the key 20, the time relay is ready to count the time, thus eliminating the instability of the time delay during the first switching on period. The circuit of this time relay consists of small-sized elements and is easy to miniaturize (except for a capacitor. Using this time relay significantly reduces the size of the equipment while improving the stability of time and increasing the reliability of its operation by eliminating the false positives of the relay from a variety of electrical equipment. Formula of the invention Time relay containing a pulse generator, made on a single junction transistor, a pulse drive, made on a single junction power transistor capacitor and connected to the executive thyristor element, a power source, characterized in that, in order to improve noise immunity and increase the specific time lag, an electronic switch is additionally introduced, the input of which is connected to the second base of the single junction transistor of the pulse generator and through the resistor V to the positive bus power supply, and the output through the diode and the resistor to the emitter of the unijunction transistor of the pulse drive, and the storage capacitor is connected between the emitter of the unijunction transistor of the pulse accumulator and the first base of the unijunction transistor of the pulse generator. Sources of information taken into account in the examination 1.US Patent No. 34172%, cl. 317-142, 1% 8. 2. USSR author's certificate number 530367, cl. H 01 H 47/18, 1974., 3. Authors certificate USSR LH 445941, cl. H 01 H 47/18, 1972.