SU1621160A1 - Pulse-width modulator - Google Patents

Abstract

The invention relates to a pulse technique and can be used in information conversion devices, and Un also in power amplifiers and secondary power sources. The pulse width modulator contains a generator of 1 clock pulses, a bit switch 2, a capacitor 3, a current source 5 and a comparator 6. Introduction to it are connected in parallel a discharge diode 4 and a key element 7, the control input of which is connected to the output of the comparator 6, and connecting the capacitor 3 with a common busbar, allows a spasmodic increase in the moment of equality of the input and deployment voltages, the developmental voltage, thus preventing false triggering of the comparator and increasing the accuracy and noise immunity of the drive voltage. The formation of the input signal. 2 Il. Uupr (L S

Description

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The invention relates to the field of pulsed technology and can be used in information conversion devices, as well as in power amplifiers and secondary power sources.

The aim of the invention is to improve noise immunity and accuracy.

Figure 1 shows the functional diagram of the pulse-width modulator; figure 2 - timing charts of his work.

The scheme contains 1 clock pulse generator, bit 2, capacitor 3, discharge diode 4, current source 5, comparator 6, key element 7, output of comparator b connected to the output bus and control input of key element 7, first input - the input bus, and the second input - with the output of the current source 5, the first output of the capacitor 3 and the common bus through the discharge switch 2, the control input of which is connected to the output of the clock pulse generator 1, and the second output of the capacitor 3 is connected to the common bus through parallel connected bit diode d 4 and key element 7.

Comparator 6 can be made on the basis of a K554SAZ chip, bit switch 2 is the key element 7 based on bipolar or field-effect transistors, and in the simplest case, current source 5 can be made on a series-connected voltage source and resistor.

Pulse width modulator operates as follows.

The clock pulse generator 1 generates a sequence of short pulses with periods T (Fig. 2a), which control discharge battery 2, which discharges storage capacitor 3 (Fig. 2b). Discharge occurs along the circuit: positive capacitor plate 3 — discharge switch 2 — common bus — discharge diode 4 — capacitor 3 plate negative. With a non-zero control voltage on the input bus after capacitor discharge 3 at the comparator 6 exit, we get the level level After the end of the clock pulse, the discharge key 2 is transferred to the non-conducting state and the arrival of the next clock pulse does not affect the operation of the circuit. The capacitor 3 starts charging from the current source 5 through the key element 7 being in the conducting state (fig. 26). The circuit retains its state until the voltage on the capacitor reaches a value equal to the control voltage

the moment at the output of the comparator changes the voltage so (figv) that the key element 7 is locked, interrupting the charge circuit of the capacitor 3. The voltage at the output of the current source 5 connected to the capacitor 3 increases, which leads to an even greater change output of the comparator. Thus, there is an avalanche-like process of transition of the circuit to a stable state, in which

the voltage at the input of the comparator connected to the capacitor 3 is equal to the voltage of the power source Un, and at the output of the comparator we have a level at which the key element 7 is closed. For appearance

After this false alarm, the interference voltage must have an amplitude equal to the difference in the voltage of the power source and the control voltage, which can be set arbitrarily large and obtain the necessary noise immunity.

Thus, the introduction of new elements and connections, the diode and the key element, the control input of which

Claims (1)

connected to the comparator output, allows fixing the moment of comparison of the input and sweep voltage with high accuracy and noise immunity due to a sudden increase in the sweep voltage and thereby increase the accuracy and noise immunity of the process of converting the input signal into a pulse width output signal. Invention Formula Pulse width modulator containing a comparator, the first input of which is connected to the input bus, and the second input - to the output of the current source, the first output of the capacitor and the common bus cut bit switch, the control input of which is connected to the output of the clock pulse generator, characterized in that, in order to improve noise immunity and accuracy, it additionally contains A charging diode and a key element are introduced, the control input of which is connected to the comparator output and the output bus; the second capacitor terminal is connected to the common bus through parallel-connected discharge diode and the key element. Uz ABOUT Un Tsulr five wil # eight FIG. 2 t