SU1619393A1 - Pulse-width modulator - Google Patents

Abstract

The invention relates to a pulse 11 different technique. The purpose of the invention is to increase accuracy and thermal stability by reducing the capacitance of the capacitor while maintaining the stability of the generated pulses, by introducing into the pulse-width modulator transistors 6 and 8 of different conductivity types, a two-polar current source 4 and an element 10. The Pulse width modulator also contains trigger 11, bus 12 clock pulses, comparator 13, operational amplifier 1, resistors 5 and 7, capacitor 2. 1 sludge. (L Ј L / x 3d CO WITH co with

Description

The invention relates to a pulse technique and can be used in systems for converting and transmitting information with a pulse in ternary modulation.

The aim of the invention is to improve the accuracy and thermal stability by reducing the capacitance of the capacitor while maintaining the duration of the generated pulses.

The drawing shows a functional diagram of a pulse width modulator,

The pulse width modulator contains an operational amplifier 1, a capacitor 2, a common bus 3, a two-field source 4, a resistor 5, a transistor 6, a resistor 7, a transistor 8, a power supply bus 9, an OR 10 element, a trigger 11, a bus 12 clock pulses, comparator 13, input bus 14, output bus 15, while the input bus 14 is connected to the first input of the comparator 13, the second input of which is connected to the inverting input of the operational amplifier 1, to the common bus 3 through the capacitor 2 and to the output of the operating bus amplifier 1 and the first output of the resistor 5 through bipolar current source 4, and the output with the second input of the trigger 11, the first input of which is connected to the bus –12 clock pulses, and the output to the non-inverting input of the operational amplifier 1 and the first input of the element OR 10, the output of which is connected to the output bus 15, and the second input - with the collector of the transistor 8 of the first conductivity type, the emitter of which is connected to the power supply bus 9, and the base through the resistor 7 - with the collector of the transistor 6 of the second conductivity type, the base of which is connected to the common bus 3, and the emitter with the second output resistor 5.

The trigger 11 must be triggered on the leading edge of the signals arriving at its inputs. Comparator 13 provides at its output signal levels consistent with trigger input signal levels, for example, 0 and + 5V. The bipolar current source 4 in the simplest case can be performed on a resistor, and the element OR 10 on two diodes.

If the voltage at the output of the operational amplifier 1 exceeds the breakdown voltage of the emitter voltage

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course of the transistor 6, then between the emitter and the common bus you must turn on the protective diode in polarity opposite to the emitter junction diode. If the lower level of the signal from the output of the trigger 11 is significantly different from zero, then a diode can be turned on between its output and the non-inverting input of the operational amplifier 1, and the non-rotating input of the operating force of the body 1 can be connected to the common bus 3 via an additional resistor.

Pulse width modulator operates as follows.

The duration of the pulse arriving at the bus 12 clock pulses should be as short as possible, i.e. required and sufficient for triggering trigger 11. In the absence of an input voltage on bus 14 and in the absence of a clock pulse on bus 12, trigger 11 is in a state where the voltage at its output is close to zero, therefore the voltage at the output of operational amplifier 1 is close to zero and on the capacitor plates 2. Transistors 6 and 8 are closed. The comparator 13 is internally adjusted so that, in the absence of voltage on the bus 14, the voltage at its output is also absent. If Ivh voltage is present and IT clock pulse arrives on bus 12, high potential is established at the output of trigger 11. On the bus 15, the front edge of the output pulse is formed through the element OR 10. The positive potential from the output of the trigger 11 leads to the formation of a positive potential at the output of the operational amplifier 1, and the capacitor 2 begins to charge through the bi-polar current source 4 when the voltage on the capacitor 2 exceeds the voltage on the bus 14 at the output the comparator 13 will generate a positive voltage, from which the trigger 11 returns to its original state and at the non-inverting input of the amplifier 1, the voltage will become zero. The voltage on the capacitor 2 is positive, so the output voltage of the amplifier 1 becomes negative polarity, and therefore the current from the output of the source 4 changes sign and the capacitor 2 begins to discharge. At the same time, transistors 6 and 8 are unlocked on the collector

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the transistor 8 and the output bus 15 remain high positive potential.

When capacitor 2 is discharged, the output voltage from the output of amplifier 1 will become zero, transistors 6 and 8 will close and the back edge of the output pulse will be formed on the output bus 15, the duration of which will be directly proportional to the input voltage I / V (on bus 14 , while the duration of the output pulse is made up of the charge and discharge times of capacitor 2. Such a structure allows for a given value of the durations of the output pulses to use the value of capacitor 2 is two times smaller.

In the case when the value of the output voltage AND 6) is more than a certain value at which the capacitor 2 does not have time to discharge to zero during the time between clock pulses, the output voltage on the bus 5 will remain positive, i.e. the duty cycle of the output pulses will be equal to one.

The instability of the PWM frequency is determined only by the instability of the frequency of the clock generator and can be obtained arbitrarily small.

Thus, the introduction of new elements and connections into the pulse-width modulator allows, while maintaining the same duration of the output pulses, to halve the capacitance of the capacitor, which improves the accuracy and thermal stability of the conversion

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analog signals to pulse width.

Claims (1)

Invention Formula A pulse width modulator containing a trigger, the first input of which is connected to the clock bus, and the second input to the output of the comparator, the first input of which is connected to the input bus, an operational amplifier whose output is connected to the first output of the first resistor, and the inverting the input is with the first capacitor output, and the second resistor is characterized in that, in order to increase the accuracy and thermal stability, by reducing the capacitance of the capacitor while maintaining the duration of the generated pulses, in addition Two transistors of different conductivity type, a two-polar current source and an OR element, whose output is connected to an output bus, the first input with a trigger output and a non-inverting input of an operational amplifier, and the second input with a collector of a transistor of the first conductivity, whose emitter is connected with source bus five 0 0 five 0 power supply, and the base through the second resistor - with the collector of the transistor of the second conductivity type, the base of which is connected to a common gain, and the emitter is connected to the second output of the first resistor, the first output of which is connected to the inverting input by an output inverter the second amplifier and the second input of the comparator, while the second output of the capacitor is connected to the common bus.