SU459849A1 - Pulse selector by duration - Google Patents

Description

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The proposed pulse selector can be used in pulse technology, telemechanics, and automation.

A pulse selector is known in terms of duration, containing an inverter, a transistor connected to a common emitter circuit, to the base of which is connected a common point of a resistor and a capacitor of a series NS circuit, and a diode, the transistor emitter and capacitor connected to the input bus, and the base to the diode cathode, anode which is connected to the general women.

A disadvantage of the known device is the ability to operate only from bipolar pulses.

In the proposed device, in order to enable the selector to operate from unipolar pulses, the emitter of the transistor is connected to the output of an inverter, the input of which is connected to the anode of the diode.

FIG. 1 shows a diagram of the proposed device; in fig. 2 shows the stress diagrams characterizing the operation of the circuit.

The pulse selector contains an inverter on a transistor 1 with a resistor 2 in the collector circuit, a transistor 3 connected according to a common emitter circuit, the base of which is connected to a power source through capacitor 4 and to the output of an inverter through capacitor 5

also the emitter of transistor 3; the base of the transistor 3 is connected to the cathode of diode 6, the anode of diode 6 is connected to the input of the inverter.

The device operates as follows. In the static mode, when the input level of the selector is low, the potential level is a logical zero (Fig. 2a), the transistor 1 of the inverter is closed, and the diode 6 is open. The capacitor through the resistor 2 and the diode 6 is charged to the magnitude of the voltage drop across the resistor 4. The transistor 3 is closed, because its emitter has a high level of potential (Fig. 2, b), and it is in deep cut-off. A nanometer-based transistor 3 is represented in FIG. 2, c. At the collector of the transistor 3, i.e. at the output of the selector, with a high potential level - a logical one (Fig. 2, d).

When a high potential selector arrives at the input (logical unit), the gd 6 closes, and transistor 1 opens, connecting the emitter of transistor 3 and the capacitor to a common bus. The capacitor begins to discharge through the resistor 4 and the emitter-collector junction of the open transistor 1. The blocking voltage of the capacitor discharge keeps transistor 3 in the closed state. At the same time, the output of the selector maintains a high level of notes (logical one.

The duration of the capacitor discharge is determined by the parameters of the resistor 4 and the capacitor.

If the duration of the input pulse t is less than the time A of the capacitor discharge, then at the end of the input pulse the circuit returns to its initial state, and the signal does not change at the circuit output.

If the duration of the input pulse 4 exceeds the discharge time of the capacitor, the transistor 3 opens after M has elapsed, with the result that the potential level at the output of the circuit changes from high to low (logical unit is replaced by logical zero).

Thus, at the output of the pulse selector, an inverted pulse is produced by duration, shortened and delayed relative to the input pulse by time D.

Subject invention

A pulse selector with a duration, containing an inverter, connected according to a circuit with an emitter, an emitter transistor, the base of which is connected via a resistor to a power source and through a capacitor to an emitter of a transistor, which is connected to the base of the diode. enabling the selector to operate from unipolar pulses, the emitter of the transistor is connected to the output of the inverter, the input of which is connected to the anode of the diode.

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