SU824450A1 - Frequency divider - Google Patents

Description

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The invention relates to a pulse technique.

Izvestia frequency dividers, made on the basis of counters accumulator. telite type and containing a capacitor with accumulation of charge, charge devices of this capacitor and a threshold device of discharge

A disadvantage of the known devices is the low noise immunity.

A frequency divider is known that contains a capacitor with accumulation of charge, one output of which is connected to the common bus and the other to the input bus through a series-connected diode and resistor and to the emitter of the single junction transistor, the first and second bases of which are connected via a resistor respectively power and shared bus 2.

A disadvantage of the known device is the low noise immunity and high current consumption and, with the help of the inter-base current of the single junction transistor.

The purpose of the invention is to increase noise immunity and reduce current consumption.

To achieve the goal, a frequency divider containing a capacitor with an accumulation of charge, one output of which is connected to the common bus and the other to the input bus through a series-connected diode and resistor and to the emitter of the single junction transistor connected to the output bus and through a resistor to the power bus, an additional resistor connected to the input bus, a thyristor whose control electrode is connected to the second output of the additional resistor, and the anode to the second base of one junction of the transistor, and ka5 Todd - a common bus, and a capacitor connected in parallel with the thyristor.

The drawing shows a circuit diagram of a frequency divider.

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The divider contains a capacitor 1 with accumulation of charge, one output of which is connected to the common bus 2, and the other to the input bus 3 through a series-connected diode 4 and

5 resistor 5 and to the emitter of the unijunction transistor 6, the first base of which is connected to the output bus 7 and through the resistor 8 to the power supply bus 9, an additional resistor 10 is connected between the input bus 3 and the control

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the thyristor electrode 11, the anode of which is connected to the second base of the single junction transistor b, and the cathode to the common bus 2, parallel to the thyristor 11 is connected a capacitor 12.

The device works as follows. ..

The input pulses of positive polarity are fed to the input bus 3. The accumulative circuit has a constant time longer than the input pulse duration, therefore the storage capacitor 1 is charged in steps. At the same time, the input impulses enter through the resistor 10 to the control electrode of the thyristor 11 and open it for the duration of the action of the input pulse. Therefore, the threshold element on the unijunction transistor b can be triggered only by the action of the input pulse, which leads to an increase in noise immunity. With such a construction, the double-dip current of the unijunction transistor b is also eliminated in the absence of input pulses, which leads to a decrease in current consumption. The capacitor 12 supports the thyristor 11 in the included. state for the delay time of operation of the threshold element on a single transistor, transistor 6, if the duration of the input pulses is less than

single junction transistor response time b.

Claims (2)

1. Short A.M. and Mochalov V.D. Electronic pulse counters. M., Energie, 1971, p. 93-100. 2. For Japan Japan 46-9593, cl. 98 (9) D 31, 1971 .. TO