SU393805A1 - DELAY DEVICE - Google Patents

Description

Visualization refers to automation and impulse technology.

Electronic delay devices are known based on the time of the master clock, the capacitor of which is connected to the power supply source voltage through the switching circuit of the charge circuit, the time of the drive capacitor, normally open key elements, containing the normally closed key element in the discharge circuit, time of the drive capacitor, pO GO: YOU connected to a common point of a resistor and a LS-target capacitor, and an i-pulse generator with a large square.

Known electronic delay devices, the accuracy and duration of the delay intervals of which are determined respectively by the stability of the oscillator of the pulse generator with a large duty cycle and a constant time setting master, do not allow to obtain long delays without increasing the constant time DC-; increase of barite ha and deterioration of stability.

The purpose of the invention is to obtain a delay time exceeding the time constant of the drug depy.

In the proposed device, the delay of the BYPASS (a pulse generator of a large duty cycle is connected via germanium diodes switched on in reverse polarity to the bases of the key transistors and to the base of the transistor of the high-level cascade.

The drawing shows the SRI device schematic.

The proposed delay device contains a time setting NS-sh & i, consisting of a resistor 1 and a capacitor 2, an "normally open key transistor 3, a normally closed key transistor 4, a short-circuited cascade" and common emitter, high-duty pulse generator: “on transistors 6 and 7, Semiconductor germanium diodes 8-10.

Transistors 3-5 together with the time of the master 7 C-circuit form a waiting multivibrator.

In the initial state, the Zi5 transistors are open, and the transistors 4 and 7, the bases of which are connected, respectively, via the resistor 11 and 12 to the collector of the transistor 5, are closed. As a result, a locking positive lead is applied to the 1 cathode of the diodes 8-10 connected to the collector of the transistor 5.

When the positive-voltage device starts to enter the triggering device, transistor 4 opens, and transistor 5 lights up. Capacitor 2 starts restart3

Press through the B-rem imposing resistance /, the power source and the open transistor 4. The high potential at the collector of the Traisistor 5, which is fed to the resistor 12, is not connected to the self-oscillating pulse in the auto-oscillatory mode.

When the transistor 7 is open, the cathodes of diodes 8-10 have zero potential, with the result that the diodes are displaced; In (Directly on direction, the bases of traisysorosis 3-5 are shunted by small € 0 resistors of open diodes 8-10 and transistor 7.

In the case of the use of silicon transistors 5-5 and germanium diodes 8-10 voltage at the base-emitter-p junctions are not enough to open the transistors 3-5 with open transistor 7 and open diodes 8-10. As a result, transistors 3-5 are closed, and the discharge of capacitor 2 is stopped. The iB moment of the next Tilting of the generator of discharging pulses, operating in self-oscillating mode, transistor 7 is jammed. A high positive potential appears in the © Collector, blocking the diodes 8-10. In this iMOMCHT transistors 3 4 open: transistor 5 - current through resistor 11, the resistor 4 - current through resistors 11 and 13 at the time of the odn-chi on the cathode 9 of the positive potential from the transistor 7. due to the current of the khoresis p and the clock capacitor 2.

The capacitor 2 is recharged, 1 is still closed for the resistor 7. The high potential at the collector of transistor 5 provides full opening of the transistor 4. In this case, the circuit consisting of series-connected resistor 14 and open transistor 3 serves as collector resistance of the transistor 4. of capacitor 2 capacitor 2 impregnation stops until the next positive imiuls appears on the cathodes of diodes 8-10. This (repeats periodically until the voltage of the Capacitor 2 capacitor 2 connected to the base of transistor 5 reaches the output of unlocking this transistor. When unlocked, the waiting multivibrator tilts. Low collector potential of transistor 5 arriving at the resistor 12 closes the transistor 7 and disrupts the self-oscillating process of the generator of discharging pulses. As a result, the delay device returns to its original state. Taki1M oi5pa30M, a pulse is generated at the output of the device aderzhki whose duration is approximately Q times (duty cycle generator zhayuschih discharge pulses) prevyschaet own braked multivibrator pulse duration defined by a time constant C 7 chain.

Subject and title

A delay device containing the time specifying the LCHchape, whose capacitor is connected to the poles of the power supply source via key silicon transistors, a noiporo cascade on the transistor connected in a common emitter circuit connected to the common point of the resistor and capacitor, the timing circuit, a pulse generator, that, in order to obtain a delay time, which is a tremendous time constant of the LS circuit, the output of the pulse generator is connected through the germanium diodes connected to the Reverse 1polarity field to the base m key transistors and the base transistor threshold cascade.

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