SU746742A1 - Apparatus for protecting memory - Google Patents

Description

(54) DEVICE TO PROTECT MEMORY

The invention relates to the field of storage devices. The devices for protecting the memory 1 are known. One of the known devices contains a read unit, registers, and logic elements, according to which the data to be protected are provided with special labels that determine the ability of the user to access the stored data. A disadvantage of the known device is that THAT in the case of replacing or deleting a tag, all information stored in memory is unprotected. It is also known a device for protecting memory, containing registers, storage information, decryptors, elements OR and AND 2. A disadvantage of the known device is its low functional reliability, which means that it is not possible to read data by unauthorized user access. to information carriers, or visual reading of data stored on punched media (punched tapes, punched cards). The aim of the invention is to increase the reliability of the device. The goal is achieved by the fact that the device contains an address codes generator, a counter and a comparison circuit, the inputs of the address codes generator are connected to the output of the information storage, the first, second and third inputs of the device and the outputs of one of the registers, respectively, and the output is connected to the first inputs of the elements And, the second inputs of which are connected to the second and third inputs of the device, the outputs of the elements And are connected to the first and second outputs of the device and one of the inputs of the counter, the other input of which is connected to the fourth To the primary input of the device, the outputs of the counter are connected to the first input of the comparison circuit and the inputs of other registers, the outputs of which are connected to the second input of the comparison circuit, the output of which is connected to the third output of the device. The drawing shows a diagram of the proposed device.

The device contains information storage device 1, address code generator 2, registers 3, first 4 and second 5 elements AND, registers 6, counter 7 and comparison circuit 8.

The inputs of the generator 2 are connected respectively to the output of the drive 1, to the first, second and third inputs of the device and the outputs of the registers 3, and the output is connected to the first inputs of the elements 4 and 5, the second inputs of which are connected to the second and third inputs of the device. The outputs of the elements And 4 and 5 are connected to the first and second outputs of the device and one of the inputs of the counter 7, the other input of which is connected to the fourth input of the device. The outputs of the counter 7 are connected to the first input of the comparison circuit 8 and the inputs of the registers 6, the outputs of which are connected to the second input of the comparison circuit 8, the output of which is connected to the third output of the device.

The device works as follows. Memory recording mode.

The program identifier, which arrives at the fourth input of the device, selects from the accumulator 1 the key of the law of moving addresses, which is fed to generator 2. The generator, in accordance with the key of the law of mixing of addresses, selects the law of mixing of addresses, according to which the mixing of addresses occurs. The lower bits of the address code are fed to generator 2 and to registers 3, in which only the first address code is written (this first address code will be needed for the read mode from the memory). The generator also receives a write request signal. On this signal, the generator starts mixing addresses received at the first input of the device in accordance with the law selected according to the address mixing rule key. At the output of the generator, a mixed sequence of addresses is formed, which, through element 5, on one of the inputs of which a write request signal is received, is fed to the first output of the device associated with a random access memory (RAM) (not shown). This sequence is also fed to counter 7, which produces an account for the formed addresses and writes it to registers 6. If the recorded information is written to an external drive, it will be rewritten from RAM sequentially, i.e., in a mixed form. Even if any unauthorized user gets the ability to read information from an external drive, he will get a mixed sequence of information.

Read mode from memory. As well as the record, the program identifier selects from the drive 1

the key of the law of mixing of addresses, which is fed to the generator 2. The generator according to the key of the law of mixing of addresses selects the law of moving addresses, which is used for mixing of addresses. The identifier with the arrival of the read request signal from the registers 3 reads the first code of the address at which this program was previously recorded. This code is fed to the generator. From the first input of the device, the lower order code bits are supplied to the generator. The higher bits of the address code (not shown in the drawing) determine the amount of memory (memory page, memory block, etc.) within which it is necessary to mix addresses. Having a memory size and a start address, the generator, on a read request signal, starts mixing addresses. The jumbled sequence of read addresses is transmitted through element 4 to one of the inputs of which is sent a read request signal to RAM. This sequence of addresses is also fed to counter 7, which, being nullified by an identifier, begins to count the number

generated read addresses and transfers this number of addresses to the comparison circuit 8. From the registers 6, by the read request signal and by the program identifier, the number of addresses of this program formed in the write mode is selected and fed to the comparison circuit.

The protection process when writing data to an external drive is explained in Table. 1. The addresses of the data to be protected come from an arithmetic unit (not shown in the drawing) to the input of a device that modifies them according to a certain law. Thus, the data in the RAM are written according to a certain law and are subsequently rewritten from there to the external drive sequentially.

As can be seen from the table. 1, the device modifies data addresses as they are written to RAM. Moreover, the addresses are modified within the amount of memory required for recording a data block. Thus, the data will be recorded in the RAM not in order, but according to a law defined for each user. When writing data to an external drive, data from

RAM is selected sequentially, starting at the first cell. As a result, the data on the external storage device are mixed according to a certain law.

When reading information, it is rewritten from an external storage device in RAM sequentially. With the help of the address translation device, a sequence of addresses is formed in which information will be read from the RAM and transmitted to the arithmetic unit. In tab. 2 shows the sequence of operations when reading data from an external storage device into an arithmetic unit of a computer.

As can be seen from the table. 2, the law of sampling data from the RAM of each of the users coincides with the law of mixing addresses when writing data to RAM.

If the second user wants to use the data from the second user, he will receive the output of the arithmetic unit of the computer instead of the sequence a b c d e d g a b c c, since the law of mixing addresses is different from the law of mixing addresses the law of sampling the first user.

The sequence of data and their corresponding addresses

: p-1

output arifna.ravte RAM input and output

, metic mouth-external

action of accumulator

abvgde abvgde bdaveg

123456 314625

abvgde abvgde vdbega

123456631524

The sequence of data and their corresponding addresses

eleven-

output viesh- I input n output output arnfnego OZUmetnicheskogo ustbdaveg bdaveg abvgde

123456 314625

in the run in the run abvgde

, 123456631524

Claims (1)

Invention Formula A device for memory protection, containing registers, an information storage device and elements AND, characterized in that, in order to increase the reliability of the device, it contains an address code generator, a counter and a comparison circuit, with the inputs of the address code generator connected to the output of the information storage device, respectively the first, ethora and third inputs of the device and the outputs of one of the registers, and the output is connected to the first inputs of the AND elements, the second inputs of which are connected to the second and third inputs of the device, the outputs of the AND elements are connected to ervym Thus, the proposed device allows the data to be stored on an external storage device with a high degree of reliability. When unauthorized use of external drives, an unauthorized user will receive a mixed sequence of data. In addition, the device does not focus on a specific type of external storage device, i.e. punched tape, a punched card array, magnetic tape, removable magnetic disks or magnetic drum cards can be used as an external storage device. In case of using punched tapes or punched cards as an external accumulator, the task of protecting data from their unauthorized extra-sensible reading is solved. Table 1 Table 2 roystva Both the second outputs of the device and one of the inputs of the counter, another input of which is connected to the fourth input of the device, the outputs of the counter are connected to the first input of the comparison circuit and the inputs of other registers whose outputs are connected to the second input of the comparison circuit whose output is connected to the third output of the device. Sources of information taken into account in the examination 1. US patent number 3886326, 235-61.6, published. 19752. USSR Author's Certificate No. 523 457, cl. G 11 C 29/00, 1975 (prototype).