SU742958A1 - Device for predicting failures of radio electronic apparatus - Google Patents

Description

'' The invention relates to measuring technique and can be used to search and predict malfunctions of electronic equipment (CEA).

Known devices for predicting faults containing sensors of object parameters, analog-to-digital converters, switches, comparators, analyzers and fault prediction units [1] and [2] A disadvantage of the known devices is the limited completeness of control.

The closest in technical essence to the proposed one is a device for predicting faults, containing series-connected sensors of monitored parameters, a first switch, a first analog-to-digital converter, a first calculator, and a recorder.

A disadvantage of the known device is the low reliability (of the Control, which depends on the failure to take into account information about the occurring failures of the controlled equipment.

The purpose of the invention is to increase the reliability of control. This goal is achieved by the fact that the device contains series-connected sensors of monitored parameters, a first switch, a first analog-digital converter, a first computer, as well as a recorder, sensors of external influences, sensors θ of failures, an information processing unit and an analyzer, the first, second and third inputs of which are connected accordingly, with the outputs of the first computer, the outputs of the sensors of external influences and the outputs of the sensors of failures, and the output with the first inputs of the recorder and the information processing unit, the second inputs of which are connected to the outputs of the fault sensors, the output is with the 20th second input of the recorder and the analyzer containing the first register, the first decoder, the second switch, the second analog-to-digital converter and the second computer, the first input of which through the first decoder is connected in series, and the first the register is connected to the third input of the analyzer, the second input is connected in series through the 30th of the second analog-to-digital converter 742958 and the second switch to the second input of the analyzer, the third input to the first at the input of the analyzer, and the output - to the output of the analyzer, as well as the fact that the information processing unit contains the first and second? registers, first and second memory nodes, pulse generator, counter, delay element, second and third decoders, is a comparison element, indicator and code generator, the first input of which is connected through the second register to the second input of the information processing unit, the second input through the first connected in series the register and the second decoder to the output of the first memory node, the third input - through series-connected delay elements and a pulse generator - to the first input of the information processing unit, and the output through sequentially with The remote comparison element and the indicator go to the output of the information processing unit, the counter input is connected to the output of the pulse generator, the output to the second input of the second decoder and the first input of the third decoder, the second input of which is connected to the output of the second memory node, and the output to the second input of the node comparisons.

Figure 1 shows a block diagram of a device for predicting malfunctions of electronic equipment; figure 2 - functional diagram · analyzer; on 'fig.Z - information processing unit,

The device contains sensors 1 of controlled parameters, the first switch 2, the first, analog-to-digital converter .3, the first computer 4, sensors 5. external influences, sensors 6 failures, the analyzer 7, block

8. information processing, registrar

9, the first register 10, the first decoder 11, the second calculator 12, the second switch 13, the second analog-to-digital converter 14, the first memory node 15, the second decoder 16, the first register 17, the code generator 18, the comparison element 19, the indicator 20., the second register 21, item. 22 delays, pulse generator 23, counter 24, third decoder 25, second memory node 26.

The proposed device operates as follows.

th. Sensors l..m measure the absolute values of the parameters of the controlled equipment. The measured values of the voltage parameters are supplied to the switch 2. Switch 2 periodically transmits the output signals from the sensors 1 through the Converter 3 to block 4.

After the second measurement and reception of the absolute values of each parameter, the switch unit 4 determines the difference in the amplitudes of the voltages corresponding to two adjacent time instants. At the same time, the difference between the result of the last measurement and the value of the maximum permissible change of this parameter is stored in the memory of block 4. The calculated results are logically processed in block 4. The time remaining until the parameter exits the tolerance is determined in accordance with the expression

A --A | - - _1 — _Aop

A - a; 1 \ . where A ^, A. are the amplitudes of the measured values of the parameter at time instants (i and (i – 1) - respectively;

A Supplementary ⁿ P ^e I ^tionary permissible amplitude parameter,

The determination of analog values of t is carried out for each of n parameters. The calculated values of t enter block 12 of the analyzer 7.

Conditions in which the REA controlled by sensors 5 operates. Sensors 5, regardless of sensors 1, generate a constant voltage level when the permissible values of the parameters of external conditions (temperature, voltage of primary power sources, etc.) are exceeded. Periodically, the switch 13 reads the signals from the sensors 5 and synchronously, through the converter 14, writes the indicators of the sensors 5 to the memory of the block 12 of the analyzer 7.

Simultaneously with the measurement of the parameters being monitored by sensors 1, sensors 6 monitor the working condition by the presence of fault signals. In this case, the fault signals are sent to register 10 of the analyzer 7. The number generated on register 10 is supplied in parallel code at the input of the bus of the analyzer decryptor 11 7 and the memory of block 12.

On the output buses of the decoder 11, a control signal is generated that generates memory addresses of the analyzer block 12 of the analyzer 7, which contains the values of the time parameters Τ ', which preceded the failure of the controlled CEA, and the characteristics of the associated external device malfunctions, as well as the estimated time for the internal tolerances to go outside parameters.

The block'12 program, in accordance with the control signal, selects from the memory the values of the parameters recorded in these cells and transfer them to the arithmetic-logical unit of block 12.

In the arithmetic-logical device of block 12, the problem of determining the factors involved in the occurrence of failures by their spatio-temporal characteristics is solved by checking the simultaneous occurrence of failures in the controlled equipment and external devices; coincidences of the moments of their appearance with changes in external conditions, as well as the possibility of the internal parameters going beyond the tolerance of t (1). In this case, the decision on the forthcoming failure of the CEA is made in accordance with the logical expression:

Zlls (2) where a = l, a-0 is the coincidence and mismatch in time of failures of the controlled -REA with 15 failures of external devices for the time Τ ', _, respectively;

B-1, b = 0 - finding the internal parameters within the boundaries corresponding to the allowable and unacceptable value of the estimated time they go beyond the tolerance, respectively;

c = 1, c = 0 — conditions characterized by external conditions accompanying the occurrence of a malfunction, within normal limits and not normal, respectively.

holding the registers of node 15 and generates a code for the numerical value of the comparison result, which is sent to element 19. The operation of element 18 is controlled by signals from generator 5 mount 23, which come through element 22. Element 19 compares the number received from the former 18 and the number from node 26 received through the decoder 25 using the counter 24. If the number at the output of the former 18 is greater than or equal to the number in the node 26, the indicator 20 receives a signal about the malfunction of the corresponding device. In case 4, if the number received by the shaper 18 is less than the number stored in the node 26, there will be no signal to the indicator 20.

The implementation of the distinguishing features of the invention allowed to reduce 20 errors of the 2nd row by about 2 times, and errors of the 1st row by 1.2 times, that is, to increase the reliability of the correct determination of the fact of an approaching REA failure and thereby increase 25 mean time between her failures in

1.5 times, and the average time between failures - j times, increase the probability of correctly determining the location of a malfunction from 0.6 - 0.8 and reduce 30 the time spent on recovery by 15-20%.

When forming a judgment, the failure signal is not caused by the aging of the elements, but by a random change in external ^ 5 conditions or a malfunction in external devices, a health signal is issued to the recorder 9.

When forming a judgment about the malfunction, the arithmetic-logical 40 device of the block 12 generates a malfunction signal to the recorder 9 and at the same time turns on the generator 23 of the node 8.

Node 8 operates as follows. 45 Before starting work in the node 15 signs are entered that characterize the deviation in the work of the tested devices. There may be 32 such signs. and the devices under test are 16. 5Q In node 26 for each device is entered a number characterizing the probability of failure of the corresponding device. In the case of a signal from the deciding unit 12 of analyzer 7, the generator 23 is turned on, which sequentially gives 16 pulses to the counter 24. The signals from the register 21 go to the shaper 18, which receives the contents of each of the sixteen 32 bits one by one from the counter 24. registers of the unit block 16 through the decoder 16 and the register 17. Shaper 18 sequentially compares the contents of the register 21 with so60

Claims (3)

The invention relates to a control measuring technique and can be used to search for and predict malfunctions of electronic equipment (CEA). Fault prediction devices are known that include object parameter sensors, analog-to-digital converters, switches, comparators, analyzers, and fault prediction blocks 1 and 2. A disadvantage of the known devices is limited control. The closest in technical essence to the present invention is a device for predicting faults, comprising successively connected sensors of monitored parameters, the first switchboard the first analog-to-digital converter, the first calculator, as well as the recorder. A disadvantage of the known device is low reliability, which is controlled depending on the neglect of information on the occurrence of monitored equipment failures. The purpose of the invention is to increase the reliability of the control. This goal is achieved by the fact that the device contains serially connected sensors of monitored parameters, the first switch, the first analog-digital converter, the first calculator, as well as the recorder, external sensors, failure sensors, information processing unit and analyzer, the first, second and third inputs of which are connected respectively with the outputs of the first computer, the outputs of the external sensors and the outputs of the sensors of failures, and the output with the first inputs of the recorder and the information processing unit, in The second inputs of which are connected to the outputs of the fault sensors, the output to the second input of the recorder and the analyzer contains the first register, the first decoder, the second switch, the second analog-to-digital converter and the second calculator whose first input is connected through the first decoder and the first register connected to the third input of the analyzer, the second input is connected in series through the second analog-to-digital converter and the second switch to the second input of the analyzer, the third input to the first input the analyzer, and the output to the output of the analyzer, as well as the fact that the information processing & processing unit contains the first and second {U registers, the first and second memory nodes, the pulse generator, the counter, the delay element, the second and third decoders, the comparison element, the indicator and the first code, the first input of which is connected via the second register to the second input of the information processing unit, the second input through the serially connected first register and the second decoder to the output of the first naivSHTH node, the third input through a series of co-dine ы elements The delay and the pulse generator are connected to the first input of the information processing unit, and the output through the serially connected comparison element and the indicator to the output of the information processing unit, the counter input is connected to the output of the pulse generator, the output to the second input of the second decoder and the first input of the third decoder, the second input of which is connected to the output of the second memory node, and the output to the second input of the comparison node. FIG. 2 is a block diagram of a device for predicting the malfunctions of electronic equipment in FIG. 2 — a functional diagram; analyzer on fig. 3 - information processing block, the device contains sensors 1 of the correlated parameters, the first comTaToP 2, the first analog-digital converter .3, the first calculate 4, the sensors 5. external influences, the sensors 6 failures, the analyzer 7, block 8, information processing, recorder 9 / first register 10, first decoder 11, second calculator 12, second switch 13, second analog-to-digital converter 14, first memory node 15, second decoder 1 first register 17, code generator 18, comparison element 19 , indicator 20, second register 21, lement 22, the delay pulse generator 23, a counter 24, a third decoder 25, the second node 26. The proposed device works as follows. and. Sensors 1,. Measure the absolute values of the parameters of the monitored equipment. The measured values of the parameter voltages are fed to the switch 2, the Commutator 2 periodically translates the output signals from Sensors 1 through the converter 3 to the block 4. After the second measurement and reception of the absolute values of each parameter, the switch 4 unit determines the amplitude difference voltages corresponding to two neighboring points in time. At the same time, the difference between the result of the last measurement and the maximum permissible change value of the parameter stored in the memory of block 4 is measured. The calculated results are logically processed in block 4. The time remaining until the parameter passes beyond the tolerance is determined according to the expression. , (eleven . i-1 where AI, A. are the amplitudes of the measured parameter values at time points (i and (1-1) are, respectively; the maximum allowable amplitude of the parameter. The analog values of t are determined by each of the n parameters. The calculated t values are received in analyzer unit 12 7. The conditions in which it operates are controlled by sensors REA 5, sensors 5 independently of sensors 1 produce when the permissible values of the parameters of external conditions {temperature, voltage of primary power sources, etc., are exceeded) constant voltage level. The switch 13 periodically reads signals from sensors 5 and synchronously, through converter 14, records the parameters of sensors 5 into the memory of block 12 of analyzer 7. Simultaneously with the measurement of monitored parameters, sensors 1 sensors and 6 monitor the state of health by the presence of failure signals . At the same time, the signals of failures go to the register 10 of the analyzer 7. The number formed on the register 10 enters the parallel code at the bus input of the decoder 11 of the analyzer 7 and the memory of the block 12. At the output buses of the decoder 11, a control signal is generated that performs the formation of the address h .ems of the block 12 of the analyzer 7, which contain the values of the parameters of time T, which preceded the failure of the monitored electronic device, and the characteristics of the external devices that accompanied it, as well as the values of the estimated time to go beyond the tolerances of internal their parameters. The program of the block 12, in accordance with the control signal, selects from the memory the values of the parameters recorded in these cells and transfers them to the arithmetic logic unit of block 12. The arithmetic logic unit of block 12 solves the problem of determining the factors involved in the occurrence of failures according to their spatial and temporal characteristics by checking the simultaneous occurrence of failures in controlled equipment and external devices / their coincidence with changes in external conditions, as well as the possibility of output of internal components before start-up by the value of t (1). In this case, the decision on the future exit of CEA and the system is made in accordance with the logical expression: Ca, to, c) where, a-0 is the coincidence and mismatch in time of the monitored REA failure with the failure of external devices during time t, respectively bl, - finding the internal parameters within the limits of the corresponding allowable and unacceptable value of the estimated time of their exit for admission, respectively, - condition, characteristic external conditions - concomitant (they fail, normal and not normal, respectively. When forming the judgment If the signal is not caused by aging of the elements, but by a random change in the external conditions or by failure in external devices, a health signal appears on the recorder 9. When forming a fault judgment, the arithmetic logic unit of the unit 12 generates a fault signal on the recorder 9 and simultaneously activates the generator 23 Node 8. Node 8 operates as follows. Before starting work, node 15 introduces signs that characterize the deviation of the tested devices. Such signs could be 32 ,. and 16 devices to be tested, Node 26 for each device is entered a number characterizing the non-failure of the corresponding device. In the case of the arrival of the signal from the decision block 12 of the analyzer 7, the generator 23 is turned on, which sequentially emits 16 pulses to the counter 24. The signals from the register 21 are fed to the driver 18, to which the signals from the counter 24 alternately receive the contents of each of the sixteen 32 bit registers of the node block 16 through the decoder 16 and register 17. Shaper 18 sequentially compares the contents of register 21 with the contents of registers of node 15 and outputs the code of the numerical value of the comparison result, which is fed to element 19. Controlled The operation of the element 18 is carried out by the generator 23 signals, which are received through the element 22. The element 19 compares the number obtained from the former 18 and the number from the node 26 obtained through the decoder 25 with the aid of the counter 24. In case the number at the output of the former 18 will be is greater than or equal to the number in node 26, the indicator 20 receives a signal that the corresponding device has failed. In the event that the number received by shaper 18 is less than the number stored in node 26, the signal on indicator 20 will not be received. The implementation of the distinctive features of the invention made it possible to reduce the odds of the 2nd pillar by about 2 times, and the errors of the 1st pk - by 1.2 times, i.e. increase the accuracy of the correct determination of the fact of the near failure of CEA and thereby increase the average time between its failures by 1.5 times and the average time between failures j times, increase the probability of correctly determining the location of the fault from 0.6 - 0, 8 and reduce the time spent on recovery by 15-20%. Claim 1. A device for predicting malfunctions of electronic equipment, containing series-connected sensors of a parameter controller, a first switch, a first analog-to-digital converter, a first calculator, and a recorder, characterized in that, in order to reliably monitor, the device contains external sensors , fault sensors, information processing unit and analyzer, the first, second and third inputs of which are connected respectively to the outputs of the first calculate l, the outputs of the sensors of external influences and the outputs of the sensors of failures, and the output - with the first inputs of the register and the information processing unit, the second inputs of which are connected to the outputs of the sensors of failures, the output - with the second input of the register. 2. The device according to claim 1, characterized in that the analyzer contains a first register, a first decoder, a second switch, a second analog-to-digital converter and a second calculator, the first input of which is connected through the first decoder and the first register connected in series to the third input of the analyzer, the second entry through serially connected second analog-to-digital converter and second switch to the second input of the analyzer, third input to the first input of the analyzer, and output to the analyzer output. 3. Device POP.1, characterized in that the information processing unit comprises first and second registers, first and second memory nodes, pulse generator, counter, delay element, second and third decoders, reference element, indicator and shaper, first input which is connected via the second register to the second block of the information processing unit, the second input is connected via the first register and the second decoder to the output of the first memory node, the third input is connected via the serially connected delay elements and the gene pulse generator - to the first input of the information processing unit, and the output through serially connected comparison element and indicator - to the output of the information processing unit, the counter input is connected to the output of the pulse generator, the output from the second input of the second decoder and the first input of the third decoder, the second input of which is connected to the output of the second memory node, and the output to the second input of the comparison node. Sources of information taken into account in the examination 1. The patent of France 2256706, cl. G About F 15/00, published 1975. 2. US patent number 3781533, cl. G About F 15/46, published. 1973. 3. USSR author's certificate No. 458833, cl. G About F 15/36, 1972 (prototype). one:; GOD TIZZIZIIJ I Chul JI H