SU907556A1 - Device for testing electric parameters of digital units - Google Patents

Description

one

The invention relates to computing and instrumentation technology and can be used in the development of automated systems for controlling digital nodes of various electronic equipment.

A control system for digital nodes AT5-960 is known, comprising a control computer connected to an input / output device and through a control device to a functional test device connected to the control object, as well as switches, meter blocks, power sources and control blocks, the device The functional check contains matching blocks consisting of a register of installations, comparators, and keys.

However, this system is characterized by increased complexity and has limited speed ij.

The closest to the technical essence of the invention is a system "1a for controlling electrical parameters

digital nodes comprising a calculator, an input / output unit, a interface unit, matching units, a control unit, digital-to-analog converters, memory blocks, AND elements, comparators, setting registers and switches 2 J.

A disadvantage of the known system is the limited functionality due to the fact that in this system, in order to organize diagnostics of digital node faults (search for faulty elements of nodes with a given search depth), it is necessary to compile verification tests that diagnose a malfunction that require additional memory space. several orders of magnitude more than the amount of memory needed to store verification tests that detect a malfunction at the outputs of digital nodes, which makes

20 troubleshooting is impossible. .  In addition, the known system does not allow stimulating signals (or reaction signals) to be set at the inputs of multi-level digital nodes, which have the form of continuous step functions of complex shape with programmable levels switching time not exceeding 10-2 °, since the output of the system is a digital-to-analog converter, the programming of which breaks the continuity of the signals it generates and which has a limited speed.  The purpose of the Invention is to expand the functional capabilities of the device.  The goal is achieved by the fact that the device for monitoring the electrical parameters of digital nodes, containing matching blocks by the number of controllable parameters, a block of programmable power sources, the output of which is connected to the first inputs of matching blocks, a control block connected by the first input and output to the output and the input of the interface unit, and the second and third outputs, respectively, with the control inputs of the programmable power supply unit and the unit, the meters, the information output is connected to the second input of the control unit, the calculator and the I / O unit connected by inputs and outputs with the corresponding outputs and inputs by the interface blocks, the second input of each matching unit is connected to the fourth output of the control unit, the first outputs and the third inputs of the matching unit are connected to device outputs and inputs, each matching unit contains a setting register connected by the first and second inputs respectively to the first inputs of the switch and comparator, the second input which is connected to the first switchboard input, the second and third inputs of which are connected respectively to the first and third inputs of the matching unit, and the second output to the first output of the matching unit, the first input of the settings register is connected to the first input of the matching unit, the second input of which is connected to the second input of the register of settings, with the first inputs of the first elements I and the third input of the comparator, the output of which is connected to the second output of the matching unit, the third output of the register of settings is connected to the second inputs of O elements and whose outputs are connected with.  the inputs of the memory block, the output of the first digital-analog converter is connected to the fourth input of the comparator.  a diagnostics unit and an analysis unit are entered, and an analog key, a second D / A converter, a counting trigger, a second AND element and an OR element are entered into each matching unit, with the fourth control unit connected to the first inputs of the ana block.  the first and second outputs and the second input of which are connected respectively to the fourth, fifth and third outputs of the matching blocks, the interrupt input of the calculator is connected to the output of the analysis unit, the second input of which is connected to the third output of the diagnostic diagnostics b, the fourth and second the outputs of the matching blocks are connected respectively to the input of the meter unit and to the third input of the control unit, and each matching block has a fourth input connected to the third inverse inputs of the first And elements and the first input The second element, And, the second input of which is connected to the fifth input of the matching unit, and the output to the first input of the OR element, the output of the memory block is connected to the second input of the OR element, the output of which is connected to the control input of the analog switch, the fourth output of the register of settings with & - one with the input of a digital-to-analog digital converter, the output of which is connected to the first information input of an analog switch, the fifth output of the register of settings is connected to the input of the second digital-analog converter, whose output is connected the fifth input of the comparator and the second information input, see the analog key, connecting the output to the fourth input of the combator, the first and third outputs of which are connected respectively to the third and fourth outputs of the diagnostic unit, and also containing the diagnostics block containing the address registers of the inputs and outputs, a channel decoder, a trigger and a multiplexer, wherein the inputs of the addresses of the inputs and outputs are connected to the first input of the diagnostic unit and the state trigger input, the output of which is connected to the second input of the diagnostic unit sticks, the output of the register of the address of the YEARS is connected to the input of the channel decoder, the output of which is connected to the peril output of the diagnostics, the output of the address register, the outputs is connected to the first control input of the Multiplexer, the second information input is connected to the diagnostic unit input, and the output is. with the third output of the diagnostics block, and the fact that the analysis block contains a comparison element, the signature register of the faulty contact, a register of diagnostic signatures and a pole analyzer, the first input of which is connected to the second input of the analysis block, the first output to the first inputs of the signature signature of the faulty contact and the register of diagnostic signatures, the outputs of which are connected respectively to the first and second inputs of the comparison element, the output of which is connected to the output of the analysis unit, the first input of which is connected to the second the inputs of the signature analyzer, the register of the signature of the faulty contact and the register of diagnostic signatures.  FIG.  1 shows a block diagram of a device for monitoring electrical parameters of digital nodes; in fig.  2 shows the time diagram of the device operation in the mode of generating stimulating signals (or the reaction signals of the monitored object) in the form of stepped functions of complex shape with a switching time of programmable levels not exceeding 10-2 O; Fig. 3 is a logic diagram of a digital node.  The device contains calculator 1, interface block 2, input / output block 3 control block 4, meter block 5, programmable power supply block 6, diagnostics block 7, analysis block 8 and matching blocks 9, setting register 1O, first AND 11 elements , comparator 12, switch 13, first 14 and second 15 digital-to-analog converters, analog key 16, control object 17, register of input addresses 18, register of output addresses 19, trigger 20, second AND 21 element, OR 22 element counter trigger 23, memory block 24, channel decoder 25, multiplexer 26 signature nalizator 27, a register 28, a faulty contact of the signature, registers of 29diagnosticheskih signatures 30sravneni element.  The logic circuit of a digital node (FIG.  3) contains, for example, elements 31-41 and having eight inputs XI. . .  X8 and two outputs U1, U2.  At the output of element 35 of this scheme, there is not a serviceability of the type of constituent, but the outputs of elements 37 and 39 are shorted at point A, forming an artificial mounting circuit OR.  Device. works as follows.  The device operates in two modes.  In the first mode, a check of the object 17 of the control for the correctness of operation by the Goden / Invalid method is performed, with the use of verification tests detecting a malfunction on the output contacts of the object of control.  In the second mode, an automatic search for a set of fault paths from the faulty output contacts of the test object to the input contacts is performed, using a verification program that uses the same test kits as in the first stage verification program.  In this case, faults of the type of closure are logically detected from the circuits with the case (constituent O), the break of logical circuits or the closure with the power supply (constituent 1) and the closure of the logical circuits between them.  In the first mode, at the command of the operator, the program is automatically searched for the test of the control object 17 connected to the device.  A program for checking the selected control object 17 stored on an external medium is inputted into the calculator 1 through the input-output unit 3 and the interface unit 2.  After that, at the operator's command, the collector 1 (in accordance with the control program entered into it) performs programming of the meter block 5, and the calculator 1 issues control commands, which through the interface block 2 and the control block 4 enter the meter block 5, the inputs which (in accordance with the control commands) are connected to the outputs of the respective switches 13 selected by the software calculator 1 from the plurality of matching blocks 9.  Using calculator 1, the inputs and outputs of the object 1 of the control to the meter of input currents in block 5 are searched and the input, output and supply circuits are switched while controlling the consumption currents.  The calculator 1 organizes with the help of block 5 meters a cycle of measuring consumption currents and comparing them with a predetermined value.  If the measured and specified current values do not match, the meter unit 5 generates a signal that is not suitable, which goes through the control unit 4 to the calculator 1, and from there to the output unit 3 and then to the registration.  If all measured currents are normal, then the further passing of the program commands is permitted.  Further, the calculator 1 performs programming of the matching block 9 and block 6.  The programming of matching blocks 9 is carried out as follows: calculator 1 via interface block 2 and control unit 4 for input (| yurmashunny trunk you give control codes that fixes register 10 of settings, determining the state of elements of matching block 9, namely switch 13, comparator 12, two digital-to-analog converters 14 and 15, which convert codes from register 10 of settings into analog levels.  For two-level digital nodes, the transducers 14 and 15 are programmed by the calculator once before testing the control object 17, and the analog levels of the transducers 14 and 15 are set at equal levels of logical 1 and 0 for the given control object 17 and none. flax until the end of the check.  For multi-level digital nodes, the stimulating signals (or reaction signals) of which must be specified in the form of continuous step functions of a complex shape (Fig.  2), the conversion of converters 14 and 15 during the inspection of the test object takes place several times depending on the shape of the required step function.  Depending on the control signals from the setting register 10, the switch 13 connects to the control object 17 either the signal input of the comparator 12 or 1 output of the analog switch 16.  Accordingly, this matching unit further (before reprogramming) performs either signal control or its generation.  After that, the calculator 1, via the interface unit 2 and the control unit 4, and through the elements AND 11 of the corresponding matching units 9 selected from their X-file for this check, sequentially records information corresponding to the testing control program in the memory 24 of all the selected blocks 9 agreement.  The memory unit 24 is, for example, random access RAM.  Due to the fact that the output of memory block 24 is connected to the input of counting flip-flop 23, the information in the cells of memory block 24 is recorded in the forward-looking signal, t. e.  units are written into the memory cells with addresses corresponding to the test case numbers on which the dogus S8 but the state changes, the remaining cells are in the zero state.  For two-level digital nodes 17, a change in state is a transition from state to O or O to I, and for multilevel nodes with a stepped form of input (output) signals, this is a transition to a new level (Fig.  2).  Programming and node1 of the sources of block 6 to the corresponding contacts of the control object 17 occurs in the following order.  The calculator 1 issues control commands, which, through the interface 2 and b-ca 4, arrive at the information input of block 6, where, in accordance with these commands, the inputs of the switches 13 corresponding to the matching blocks 9 are connected to the power supply of block b, the potential on which are also programmed by commands from computer 1.  After that, the first inputs of the registers Yu of the settings of the selected matching blocks 9 are received from the calculator 1 command, which generates potentials at the first outputs of the register Yu of the settings, arriving at the first inputs of the switches 13 and enabling the power supply to the inputs of the object 17 of the control.  The verification of the control object 17 is carried out by cyclically generating stimulating effects and evaluating its reactions.  During each control cycle, the calculator 1 through the interface block 2, the blackened 4 controls and the AND 11 elements, flies in parallel to all the blocks of 24 memories of the selected matching block 9 control commands (addresses), resulting in alternating codes recorded in a specific field of the block 24 memories are fed to the input of the counting trigger 23.  The counting trigger 23 converts the sequence of alternating signs into a real test signal, which through the OR circuit 22 arrives at the control input of the analog switch 16 (Fig.  2).  Depending on the input signal (logical O or logical 1) at the control input of the analog switch 16, it passes to the output either the analog level from the converter 14, or the analog level from the converter 15.  These levels from the output of the analog key 16 through the switch 13 are fed to the inputs of the object 17 of the control.  The fronts of the signal levels arriving at the inputs of the 17 ksitr object. l.  . 11) The unit is made by the action of the analog key 16 and, when used for its manufacture, the cell components have a value in the order of 10 to 20 n.  The previously programmed matching blocks 9, ocyuus, control the reactions.  Levels from converters 14 and 15 are compared by means of comparators 12 with a reaction signal received via switch 13 from control object 17.  The comparison result comes from the outputs of the comparators 12 of the selected matching unit 9 to the input of the control unit 4.  If there is at least one of the selected matching units for the discrepancy between the required reaction and the actual output signal, the control unit 4 stops the checking program, determines the numbers of the faulty contacts and you give information about them through the unit 2 in conjunction with the terminal 1, which outputs this data to output block 3 for registration.  If on the next verification cycle it is necessary to move to a new level on the input or output of the control object 17 for digital nodes with a stepped form of input (output) signals, fb calculator 1 will reprogram the information converter, which is currently disconnected from the inputs of the control object 17 or not used in the previous cycle to set the desired reaction (Fig.  2).  After that, the calculator organizes the next test cycle.  Subsequent W control cycles are analogously performed.  As a result of testing the control object 17 in the first mode, the numbers of the faulty contacts are determined both on each test set and on the entire set N (test sets).  Information about the numbers of faulty output contacts is recorded in a certain area of the RAM of calculator 1 and is then used (as source data) in the second mode check program.  In the same zone of the operating memory of the calculator 1, there is an insight about the groups of input contacts that have a logical connection with the output contacts, which is entered into this area by the block 3 from the external media at the moment of entering the test programs of this object 17 of the control.  The set of input clocks that have a logical connection with the 1st output contact depends on the de-graph of the control object, and M1 M me nce is determined by the number of output contacts OK.  Thus, as a result of checking the object of control in the first mode, a submultiplication of groups from the full set of M groups is determined.  A subset of P is determined by the number of defective output pins.  In the second mode, if there is at least one faulty contact (the result of checking the control object at the first stage is inefficient), the program for finding fault traces is started by a command from calculator 1.  The calculator 1 outputs the address of the 1st defective contact from the subset P, which enters the information line in block 7 diagnostics 11 to the input of the register 19 of the output address, the output of which addresses the address code to the control input of the multiplexer 26, which connects the selected 1st vocoded contact control object to the signature analyzer input.  Next, compute step 1 starts the first mode test program without stopping after each test set to analyze the control results.  To the input of the object 17, the controller is similar to the psrvo {y mode and the same dough sets arrive, which generate the output of the 1X1x contacts of the object 17 of the control, the final sequence from the gnalop (response).  reacted), which signature analyzer 27 converts into signature code.  After issuing all the test requisitions and the input of the control object 17, the calculator 1 issues a command to the register 28, and the signature code value for the selected i -th faulty output contact of the control object 17 is written to it from the output of the signature analyzer 27.  The value of the signature code for the contact can be any and depends on the type and location of the fault within the object 17 of the control.  After that, the calculator issues the address code of the first O-th input contact from the set, which enters the diagnostics unit 7 to the input of the input address register 18, from which the address code goes to the input of the channel decoder 25, which forms its output signal I enter 1 input. ; Lemmery 11 and I 21 of the 9th negotiation unit 9, in this case, the passage of control commands from the calculator 1 is prohibited to the input of the memory block 24 and the passage

to the control input of the analog key are 16 levels of signals from the Step of the diagnostic unit 7 from the trigger 20, which is currently in any STATCHEN. Next, vytyulntep 1 again starts the program to test the first rendama. In this case, the burut is generated on all inputs, except for the selected J-th, the same input sequence as in the previous case. At the same time, if there are no faults on the route from the input D-ro to the output 1st contact, then the signature code different from the previous one will be fixed in the signature analyzer 27, because the constant signal level is present on the -th input contact there are sequences of signals on it, and if on this route there is one several logical faults of the type of constituent O or constituent I, then the signature code, which is previous, will be fixed in signature analyzer 27, because ekta 17 in the absence of branches converging gtsihs n logical tree graph set Q does not lead to a change in the output sequence at the output - -th faulty contact. After this, computational 1 issues a command to register 29, and the value of the diagnostic code of the 1 st input contact is entered into it from the output of signature analyzer 27. signature of i-th irregular contact and diagnostics signature - (input 1 contact is equal, then comparison element 30 is triggered, and from its output the calculator 1 receives an interrupt signal, which indicates a fault on the tested path. After searching all input contacts of the set Q for the output -f of the faulty contact, the calculator 1 enters in the register 28 the address of the next and faulty contact, for which the same operations are carried out as for the i faulty contact, in order to detect ss of faults, etc. until all faulty P output faulty contacts are processed, noaiie this calculator 1 starts a program that determines the absence of short circuits between the logical circuits inside the control object 17. This determines the absence of the short circuit tracks both inside the groups themselves, thea and between the tracks of different groups Q. of the whole subset of R.

The algorithm of the device in this case will be as follows.

On command from calculator 1 (as described above), the i-th output contact is selected, which is connected via multiplexer 26 to the input of the signature analyzer 27, and then one of the input contacts that belongs to the union of the sets of input contacts Q of all subsets of P is selected. ygKPo command from

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Claims (2)

calculator 1 arriving at the information highway to the input of diagnostic unit 7, trigger 20 is set to O state. Next, calculator 1 starts the program for checking the first stage and at the end of the cycle of issuing all tesg sets to the inputs of object 17 organizes the signature code signature signature 27 register 28, while the signature code can be any and depends on the type and location of the fault inside the control object 17. After this, the calculator 1 sets the trigger 2O to the state 1 and starts the program again. pkki first relshma, and then organizes the recording of the value of the newly received signature code in register 29. If the signature codes coincide, then there are no closures of the trace from the output 1st contact to the 3rd input contact (trace) with the rest of the traces from the output –i contacts to all things; To input contacts, if the signature codes are different, then the circuit has MeCiO. This is due to the fact that when two different internal points on the logical graph tree (Fig. 3, point A) are closed, an OR circuit is formed, and if one receives a sequence of signals that is opi ed by the first-stage verification program at the input of one of the permixed traces , and the input of the other is alternately applied first to the level of logical O, then to the level of logical 1, then in one case this sequence will be passed to the output of the circuit, and in the other case it will be prohibited by this level of logical C at the output, artificial but the created wiring diagram is OR. The signal level (logic O or 1) at the input of the 1st input contact, at which the artificially created wiring diagram OR prohibits signals from other inputs that have a logical connection with the output of the wiring OR, depends on the number of inverting elements OK, which are the path from the input D-th pin 139 to the output of the wiring circuit OR If the signature codes do not match, the comparison element 30 generates an interrupt signal that is fed to the input of the calculator 1 and signals the presence of the closure of the track 3 being checked with the rest of the paths from By nozhestva EZSOD GOVERNMENTAL contacts to only a subset of P vyhodaplh contacts. Then, a spin-off contact is selected from the subset P of the output pins, for which the same operations are repeated, for the purpose of determining the closure, between the other traces, etc., until all traces between the set K of the close contacts and the subset P are checked for the absence of closures. output pins. Since in the case of closures between the traces inside the object 17, the presence of these closures is determined twice, which follows from the verification algorithm, the calculator 1, using this data, as well as the initial information about the subsets P of the output faulty contacts and the corresponding sets of the input contacts Oi, ; i) Etif identifies the numbers of closed traces both within groups Q and the numbers of closed, traces of different groups Q of the whole subset P. This completes the program of the second stage check, while the numerator 1 through the interface 2 on the output unit 3, the following information is registered: the number of fault lines (the chromer of the output faulty contact and the number of one or several input contacts on the path between which eats an instability) in the number of P pieces, information on the absence of closures inside the logical circuits of the object 17 of the control, and if If there are closures, then information about the numbers of the tracks that have closures both within the Q groups and between the tracks of different groups. The reader shown in FIG. 2, it can be seen that when checking this logic in the first control mode, two output faulty contacts U1 and Y2 are defined, which define a subset of P for this example. Inputs XI, X2, X3, X4, X5, X6 belong to the set of input contacts Q for the output output terminal U1, and inputs X5, X7, X8 belong to the set of input contacts QU for the output faulty contact U2. In the second mode, fault paths U1-X3, U1-X4, U1-X5, 56 U2-X5, U2-X6, U2-X7 are determined. Y2-X8 and the following circuits are detected: X6-U1 with X5-Y1, X7-J2 with X8-Y2, X5U2 with X6-Y1, X7-Y2 with X6-Y1, X8-Y2 with X6-Y1. By matching the logic with the received data, the area where the fault is located is determined. The combination of the paths of faults U1-XZ, U1-X4 and U1-X5 is possible only if there is an element 35 at the output of an O type or constituent type 1 fault. The above combinations of closed routes are possible only if there is an input or output circuit of element 37 with an input or output AE 4O. In this case, the diagnostics of the malfunction inside the digital node is performed with the depth of the search to the electrical circuit of the circuit without attracting additional computing power of the calculator 1 and without access to the internal points of the logic circuit. Thus, the introduction into the system of a diagnostic unit 7 and an analysis unit 8, and in each matching block of the analog key 16 of the second digitizer 15, the counting trigger S3, the element 21, and the OR 2 element 2, allows setting the coding signals to the codes of the multilevel digital nodes ( or reaction signals) in the form of continuous stepwise layer forms with switching times of programmable levels, not exceeding 1 O-20, as well as performing diagnostics of malfunctions of digital KNOTS without invoking a dokalkitelitelnuyu calculate noy power calculator 1, which extends the functionality of the device. An apparatus for monitoring electrical parameters of digital nodes, comprising matching units by the number of monitored parameters, a block of programmable power sources, the output of which is connected to the first inputs of matching blocks, a control unit connected by the first input and the first output, respectively, to the output and input of the interface, . and the second and third outlets, respectively, with the control inputs of the programmable power supply unit and the meter unit, the information output of which is connected to the second input of the control unit, calculate the 159 heat and input / output unit connected to the inputs and outputs with the corresponding outputs and inputs of the unit The second input of each matching unit is connected to the fourth output of the control unit, the first outputs and the third inputs of the matching unit are connected to the corresponding outputs and inputs of the device, each the matching unit contains the settings register connected to the first and second outputs, respectively, to the first inputs of the switch and comparator, the second input of which is connected to the first output of the combiator, the second and third inputs of which are connected to the first and third inputs of the matching unit, and the second output from the first the output of the matching unit, the first input of the register of settings is connected to the first input of the matching unit, the second input of which is connected to the second input of the register of settings, with the first inputs of the first And elements and the third input of the cocharator, the output of which is connected to the second output of the matching unit, the third output of the register of settings is connected to the second inputs of the first And elements, the outputs of which are connected.1 to the inputs of the memory unit, the output of the first digital-analog converter is connected to the fourth input of the comparator, tl and it is so that, in order to expand its functionality, a diagnostics block and an analysis block are entered into it, and an analog key is additionally inserted into each matching block, a second digital-to-analog converter with even trigger, second AND element and OR element; the fourth output of the control unit is connected to the primary inputs of the analysis unit to the diagnostic unit, the first, second codes and the second input of which are connected to the fourth, fifth inputs and the third outputs of the matching unit, the interrupt input are The numerator is connected to the output of the analysis unit, the second input of which is connected to the third output of the diagnostic unit, the fourth and second outputs of the matching unit are connected, respectively, to the input of the unit, measure it and to the third output. in each correcting unit, the fourth input is connected to the third inverse inputs of the first AND elements and to the first input of the second element AND, the second input connected to the fifth input of the matching unit, and the output to the first input of the OR element, the output of memory block 56 is connected to the input of the counting trigger, the output of which is connected to the second input of the OR element, the output of which is connected to the control input of the analog switch, the fourth output of the register of settings is connected to the input of the first digital-analogue converter, output Which is connected to the first information input of the analogue Yuguch, the fifth output of the register of settings is connected to the input of the second digital-to-analog converter, the output of which is connected to the fifth input of the comparator and to the second information input of the analog key connected by the output to the fourth input of the commutator, the first and third outputs of which are connected respectively to the third and fourth outputs of the matching unit, the diagnostics block containing the addresses of the inputs and outputs, the channel decoder, the trigger and the multiplex a corr, the inputs of the registers of the addresses of the inputs and outputs are connected to the first input of the diagnostics unit by the trigger input, the output of which is connected to the second input of the diagnostic unit, the output of the register of the addresses of the inputs is connected to the input of the channel decoder, the output of which is connected to the first output of the diagnostic unit the output addresses are connected to the first control input of the multiplexer, the second informational input of which is connected to the second input of the diagnostic unit, and the output to the third output of the diagnostic unit, and the analysis unit A comparison element, the signature register of the faulty contact, the diagnostic signature register and the signature analyzer, the first input of which is connected to the second input of the analysis unit, the first output to the first inputs of the signature register of the faulty contact and:) The signature of the diagnostic signatures whose outputs are connected to the first one and the second inputs of the comparison element, the output of which is connected to the output of the analysis unit, the first input of which is connected to the second inputs of the signature analyzer, of the signature register right contact and register of diagnostic signatures. Sources of information, take into account when an expert is 1.Electronics. 1972, No. 21, p. 45-54. 2. USSR author's certificate for software No. 28459О9, cl. G06 F 15/46, 1919 (prototype).