SU726560A1 - Discrete signal transmitting and receiving device - Google Patents

Description

(54) DEVICE FOR TRANSFER AND RECEPTION OF DISCRETE. SIGNALS

The invention relates to devices for transmitting and receiving discrete signals used on duplex communication channels in the event of interference. A device 1 is known for detecting and receiving secret signals used on duplex communication channels with different amounts of delay in the passage of signals through them in order to increase the reliability of information transmission under the conditions of channel interference. In the known device, the feedback channel is used to transmit request signals or receipts of received codewords, which reduces the information transmission rate. The closest in technical essence to the invention is a device 2 for transmitting and receiving discrete signals, comprising a first switch, the output of which is connected to the input of a coding block of a block and through the first drive-repeater to the first input of the first switch. The first output unit is connected to the first input of the first block of the lamination, the second output is connected to the input of the second delay element, the outputs of which are connected to the first inputs of the respective comparison units. The output of the second addition unit is connected to the second inputs of the comparison units, the outputs of which are connected to the inputs of the respective registers and to the first inputs of the corresponding control elements. The outputs of the registers are connected to the inputs of the memory blocks, the outputs of which are connected to the second, inputs of the respective control elements, the outputs of which are connected to the first inputs of the memory element, the first counter and the first outputs of the decoding unit and the memory element. The first output, the first counter, connects Chen to the third input of the first switch, the second output connects to the first input of the second repeater drive, and the second input of which is connected to the second output of the decoder unit. The third output of the counter is connected to the second input of 4 memory elements, and the third output of the decoder of this block to the second input of the second addition block. The output of the first addition unit is connected to the first output of the device, the output of the second accumulator repeater -

726560 to the second output of the device, and the output of the lepBorb delay unit to the second input of the first addition unit. The disadvantage of the device SHG Goethe lack of control of the health of functional units and nodes, which reduces the reliability of the device. The aim of the invention is to increase the reliability of the device. This goal is achieved by the fact that the proposed device introduces the second and third switches, the second and third counters, the control unit, the sensor, the analyzer, the trigger, the commutator, and the third delay element. You have a sensor stroke connected to the first input, -, the remote control of the second switch, the second input of which is connected to the first input of the device, and the output to the second input of the pertz switch. The output of the control unit is connected to the third input of the second switch, to the first inputs of the second and third counters, to the first trigger input, to the first input of the switch, to the first inputs of the analyzer and the third switch, the second input of which is connected to the output of the first addition block, and the third input - Kb to the second inputs of the device. The output of the third switch is connected to the first inputs of the decoding unit and the second unit. The output of the second flashing light is connected to the second input of the analyzer, the output of which is connected to the second input of the second counter. You moves the controls to the second input of the trigger, the third input of which is connected to the output of the second counter. The trigger output is connected by the qSinrO BTopOMy input by the switches to the second input of the third counter, the output of which is connected to the input of the control unit. The third output of the decoding unit is connected to the third input of the switch. The outputs of the latter are connected to the corresponding inputs of the third delay element, the output of which is connected to the second input of the first VOI delay element. The block diagram of the device is shown in the drawing. . The device contains the first switch 1, the first drive-repeater 2, the coding unit 3, the first block-adding 4, the first delay element 5, the first counter 6, the second drive-repeater 7, the element on the ms sgd 8, the decoding unit 9, the second element delays 10, the second block of the lamination 11, the blocks of comparison 12-14, the registers 15-17, the memory blocks 18-20, the control elements 21-23, the sensor 24, the analyzer 25 of the control signal sequence, the second 26 and the third 27 switches, the control unit 28, second 29 and third 30 counters, third element, delay 31, ko mutat p 32 and a trigger 33, a first input

4 4, the second output 35, the second input 36, the first output 37. The device operates as follows. The control unit of 28 signals from the outputs determines two modes of the device operation: operating mode — transfer and reception of information signals via communication channels; i; i control mode — transmission and analysis of the control sequence of sigals. In operating mode, signals from the output the control unit 28 sets the switches 26 and 27 and the switch 32 to the position providing the connection of the first (informative) input 34 of the device respectively to the first input of the switch 1, the second (channel) input 36 of the device about the input of the decoding unit eye 9 and peromu entry adding unit 11, second- second output the decoding unit 9 to the input of the delay element 5 through the switch element 32 and 31 without introducing additional zapazdshani during the passage of signals on this path. In this mode, the operation of the proposed device is similar to the operation of the known device. -. When switching to the control mode by signals from the output of the control unit 28, the trigger 33 is set to its original position, the counters 29, 30, the position of the switches 26, 27 is changed, and the analyzer 25 is connected to analyze the signals from the repeater accumulator & 7. The control sequence signals from the output of the sensor 24 through the switches 26 and 1 are fed to the coding switch block 3 and the drive repeater 2. In block 3, the received signals are converted into combinations of the redundant code. Then, the signals of the code combination from the output of block 3 through the block of addition 4, where the addition of the check symbols of the code combination with the check symbols formed by the decoding block 9, is received through the output 37 of the device, switch 27 on. the input of the decoding unit 9 and the first input of the second addition unit 11. The decodi fi cation unit 9, using the information symbols of this combination, forms test symbols and issues from one of its outputs to the second input of the addition unit 11 and through the switch 32, elements for, 31 and 5 to the second input of the addition unit 4. The delay element .5 ensures that the signals arrive at the first and second inputs of the unit 4 at a time. Since in the initial stage of the control mode, the signals from the output of the decoding unit 9 pass through blocks 32 and 31 to the electrical input ment 5 without lag, the adding unit 4 check symbols formed by unit 9 on a combination of information symbols received at its input at the moment, are added to the check,. characters of the next transmitted combination. Therefore, the signals from the output of the addition block 11, which are the result of the addition of the check symbols that are added together with the combination, and the symbols formed by the decoding unit 9, coincide with the control symbols formed by the encoding unit 3 and received 1 and from the first output of the delay element 10 the input of the comparison block 12. The input signals on the rest b-poks of the comparison do not coincide with each other. If at this time the control element connected to the output of the comparator unit with non-coincident inputs is open, then the inputs of the counter 6 and the memory element 8 error signals of the device re-enter the request and repeat mode of the combinations. The error signals are also received at the second input of the trigger 33, keeping it in the initial position. In this case, the input signals of the analyzer 25 are not received. However, after the occurrence of several coincidence signals at the output of comparator 12, the signal from the output of register 15 changes the state of memory blocks 18–20, opens control element 21 connected to comparator 12 and closes other elements of the pack. , elements 21-23 does not arrive. At the end of the request for the analyzer 25 to enter the analyzer 25, the second accumulator output of the tortor 7 begins to receive signals, if the signals received at the analyzer 25 input correspond to the control sequence, then from the output of the analyzer 25 to the input counter of the counter 29, signals begin to arrive It triggers and issues a signal to the first input of the trigger 35, transferring the trigger from the initial state (for example, left) to another (one). The signal from the output of the trigger when it passes to one state triggers switch 32 and connects the second output of decoding unit 9 to the second input of delay element 31, thereby introducing an additional delay into the passage of test symbols from unit 9 into the first addition unit for a time equal to the duration of the transfer of one code combinations. As a result, the coincidence of the signals no longer occurs at the inputs of the comparator unit 12, but at the inputs of the comparator unit 13, one of the inputs of which is connected to the second output of the element 10. The error signals from the output of the unit 12 through the open control element 21 are fed to the second input of the trigger 33 , transfer it to the zero state, and to the input of the counter 6 and transfer the device to the request mode until, under the influence of the coincidence signals from the output of the comparison unit 13 through the register 16 and the memory block 19, the control element 21 is not closed, through which Error signals are passed, and does not open the control element 22 connected to the comparing unit 13 with the input signals sovpadagatsimi, t. e. not yet ceased entrance 6 for delivery s.ignalov error counter. After the device leaves the request mode, analyzer signals from the analyzer input 25 begin to arrive again. When properly received, the analyzer 25 begins to send signals to the input of counter 29, under the influence of which counter 29 generates a signal for switching the trigger 33. The signal from the output of the trigger enters the switching of the switch 32. The switch 32 connects the signals of the test symbols from the output of the decoding unit 9 to the third input of the delay element 31, thereby increasing the delay in the passage of signals from the output of block 9 to the input of block 4 by a time equal to the duration of transmission of one combination. As a result, an error signal begins to be output from the control element 22, since the signals at the input of the comparison unit 13 no longer coincide with each other, and the coincidence of the input signals occurs at the inputs of the comparison unit 14. Subsequently, the device works in a similar way. Full health check of all units and units of the device is completed after setting such a delay in element 31, when the input signals coincide in the comparison unit connected to the last output of delay element 10. Trigger 33 under the influence of signals from the output of counter 29 and from the combined output of elements control 21-23, arriving at different inputs of the trigger, periodically changes its state, providing control of the commutator meter, the capacity of which is chosen equal to the number of outputs with the element that a delay of 10 or greater than this number. The appearance of a signal from the output of the counter 30 at the input of the control unit 28 indicates that the control check of the operation of the device is completed. With proper operation of all nodes and units of the device, the time of its control check is always the same. If a malfunction occurs, the checkout time increases. Therefore, it is possible to measure the time or counting, the number of cycles of operation of the device from the switching point of it to the monitoring mode and until it arrives at the control unit 28 of the signal from the input of the counter 30, it is possible to judge the result of the TV test check. Delay The trigger 30 is triggered when the frequency of the 33 trigger signal and the signals from the 29 tTaK counter output to the control inputs of the trigger and the signals of the control sequence analyzer 25 is corrupted. ignalov does not produce signals of respective and outputs them to the input of counter 29. When nalichiine. health conditions leading to a permanent selection of signals, an error, for example, with failures of coding or decoding blocks, addition blocks, as well as delay elements, comparison blocks, registers, memory blocks, with inconsistent delays in the passage of signals through element 31 and through element 10 from its input to the output connected through the corresponding comparison block to the open control element, the signal on the control card 6 seconds and also shows that r1E leads back to the control mode and detected. Zhenyu, therefore, not present in good condition in the device. The proposed device allows you to check the health of the action of almost all units and units of the device, which ensures its reliability. Invention Formula. A device for transmitting and receiving discrete signals, comprising a first switch, the output of which is connected to the input of a coil unit and through the first accumulator repeater to the first input of the first switch, the first output of the coding block is connected to the first input of the first adder unit, the second output the coding unit is connected to the input of the second delay element, the outputs to Toro are connected to the first inlets of the respective comparison units, the output of the second unit of the input and the second unit to the second units of the cpaB HeHiiW, which exit nx podklineny to the inputs of the respective registers and a lane. The control panel inputs are connected, the register outputs are connected to the memory block inputs, the outputs are connected to the second inputs of the corresponding control elements, the outputs of which are connected to the first inputs of the memory element, the first account and the first outputs of the memory block 6 and memory element , the first output of the first counter is connected to the third input of the first switch, the second output of the first counter is connected to the first input of the second repeater drive, to the second input of which the second output of the decodi is connected block, the third output of the counter is connected to the second input of the memory element, the third output of the decoding block is connected to the second input of the second adding block, the output of the first adding block: connected to the first output of the device, the output of the second accumulator repeater is connected to the second output of the first The delay unit is connected to the second. to the input of the first addition unit, about t and which, in order to increase the reliability of the device, the second and third switches, the second and third counters, LOC control, sensor, analyzer, trigger, switch and the third delay element, output the sensor is connected to the first input of the second switch, the second input of which is connected to the first, device input, and the output is connected to the first input of the first switch, the output of the control unit is connected to the third input of the second switch, to the first inputs of the second and third counters, a first input flip-flop to the first input ksmmutatora, to the first inputs of the analyzer and the third switch, the second input of which is coupled; The output of the third switch is connected to the first inputs of the decoding unit and the second addition block, the output of the second accumulator repeater is connected to the second input of the analyzer, the output of which is connected to the second input of the second counter , the outputs of the control elements are connected to the second input of the trigger, the third I / O of which is connected to the output of the second counter, the output of the trigger is connected to the second input of the switch, and to the second input of the third axis The sensor, yyk of which is connected to the input unit of the control unit, the third output of the decoder unit is connected to the third input of the switch, the outputs of which are connected to the corresponding inputs of the third delay element, the output of the third delay element is connected to the second input at the first delay element,. Sources of information taken into account during the examination 1. USSR author's certificate №447745, cl. G 08 C 25/02, 03/26/73. 2. Copyright testimony of the USSR No. 557403, .kl. G OZ C 19/28, 13.10.75 (prototype).

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Claims (1)

Claim A device for transmitting and receiving discrete signals, comprising a first switch, the output of which is connected to the input of the coding unit. and through the first drive-repeater to the first input of the first switch, the first output of the encoding unit is connected to the first input of the first addition unit, the second output of the encoding unit is connected to the input of the second delay element, the outputs of which are connected to the first inputs of the corresponding comparison units, the output of the second block ..... addition is connected 'to the second inputs of the comparison blocks,''. the outputs ^{1 of} which are connected to the inputs of the corresponding registers and to the first inputs of the corresponding control elements, the outputs of the registers are connected to the inputs of the memory blocks, the outputs of which are connected to the second inputs of the corresponding controls, the outputs of which are connected to the first inputs of the memory element, the first counter and the first the outputs of the decoding unit and the memory element, the first output of the first counter is connected to (the third · input of the first switch., the second output of the first counter is connected to the first input of the second a repeater, to the second input of which the second output of the decoding unit is connected, the third output of the counter is connected to the second input of the memory element, the third output of the decoding unit is connected to the second input of the second addition unit, the output of the first addition unit; connected to the first output of the device the repeater drive is connected to the second output of the device, the output of the first delay unit is connected to the second input of the first addition unit, which is different in that, in order to increase the reliability of the device, the second and third switches, the second and third counters, the control button, sensor, analyzer, trigger, switch, and the “third element” of delay, the sensor output is connected to the first input of the second switch, the second input of which is connected to the first input of the device, and the output with the second input of the first switch, the output of the control unit is connected to the third input of the second switch, to the first inputs of the second and third counters, to the first input of the trigger, I to the first input of the switch, to the first ’inputs of the analyzer and the third switch, the second input of which is connected; with the output of the first addition unit, and the third input is connected to the second input of the device, the output of the third switch is connected to the first inputs of the decoding unit and the second addition unit, the output of the second drive-repeater is connected to the second input of the analyzer, the output of which I connected to the second input of the second counter, the outputs of the controls. connected to the second input of the trigger, · the third input of which is connected to the output of the second counter, the output of the trigger i ^ is connected to the second input of the switch = and to the second input of the third counter, whose output is connected to the input of the control unit, the third output of the decoding unit is connected to the third input of the switch, the outputs of which are connected to the corresponding inputs of the third delay element, the output of the Third delay element 'is connected to the second input of the first delay element. ki. 60