SU697940A1 - Device for processing signals of doppler speed meter - Google Patents

Description

I

The invention relates to radar and can be used to process signals from a Doppler flow velocity meter in azodynamic systems.

A device for processing signals of a Doppler velocity meter, containing N channels, each of which contains a series-connected band-pass filter and a key, is known, the inputs of the band-pass filters and the key outputs of all channels are interconnected and are the input and output of the device, respectively, and the second output of the band pass the filter of each channel is connected to the gate driver input 1.

This device has a low accuracy and complex design.

The purpose of the invention is to improve the accuracy and simplify the device.

For this purpose, a Doppler velocity meter containing N channels, each of which contains a serially connected bandpass filter and a key, is in the device for processing signals, while the inputs of the bandpass filters and the key outputs of all channels are interconnected and are respectively the input and output of the device, and the second the output of the bandpass filter of each channel is connected to the input of the gate generator, elements N AND-NOT, (N + 1) AND-NOT and a controllable inverter are entered, and two elements 2I-NO, element 5I-NO, inv Key and blocking key. The output of the gate driver of each channel through the element 5И-NOT is connected to the second input of the key, the first inputs of the elements 2И-NOT of its channel and to the second and third inputs of the elements 5И-Не according to the previous and subsequent channels and to the inputs of the element N И И НЕ. The second inputs of the elements 2I-NOT of each channel are interconnected and connected respectively to the outputs of the element (N + 1) AND-NO and element N AND-NO. The outputs of the elements 2I-NOT of each of the channels are connected respectively to the fourth and fifth inputs of the element 5I-NOT of their channel. The second output of the bandpass filter of each channel is connected to the first input of the blocking key, the second input of which is connected to the output of the second element 2I-NOT of its own channel. Output for-.

The gateway gate of each channel through the inverter is connected to the corresponding input of the element (N + 1) AND-NOT, the output of the element N AND-NOT through a controlled inverter is connected to the corresponding input of the element (N + 1) I-NB. The outputs of the locking keys are interconnected and connected to the device body, the Gate driver is made in the form of a series-connected amplitude selector and a detecting cascade, with the input of the amplitude selector being the input of the gate generator, and the output of the detection cascade its output.

FIG. 1 shows a structural electrical circuit of the device; in fig. 2 - time diagrams.

The device for signal processing contains a bandpass filter 1, a key 2, a shaper shaper 3, elements NH-HE 4, elements (N + 1) AND-HE 5, a controlled inverter 6, a blocking key 7, an amplitude selector 8, a detecting stage 9 elements 2I-NOT 10, elements 5Y-NOT 11, elements 2I-NOT 12 and inverter 13.

The proposed scheme works as follows.

In the initial state (in the absence of an input signal) signals are not received from the outputs of the band-pass filters 1 and logic zeros are set up at the outputs of the formers 3, logical ones are outputted at the outputs of all elements 5И-НЕ 11, and at the output of elements NH-HE 4 which is inverted by the controlled inverter 6 into a logical unit and. together with inverted logical zeroes from the outputs of the three gate formers, enters the inputs of the elements (N + 1) AND-HE 5, at the output of which a logical zero is formed, which forms the logical units at the outputs of all the elements 2I-NOT. A logical zero from the output of the N AND-HE 4 elements forms the logical units at the outputs of all 2INE 10 elements, which close the blocking keys 7, after which the latter do not affect the signal passing through the band-pass filters 1. Logical units from the outputs of the 5И-НЕ 11 elements Keep the keys closed 2.

With the arrival of the Doppler frequency input signal (Fig. 2a), the output of the corresponding band-pass filter 1 appears a useful component of the signal (Fig. 26). In the one of the bandpass filters 1, whose frequency most corresponds to the Doscher scale, the extreme value of the useful one is the highest and, therefore, the signal at its output reaches the level of the formation of the strobe pulse UQ (Fig. 26) by the former 3 (the formation levels of all the former 3 are the same) . The level is set in amplitude selectors 8, and a standard pulse signal is generated from UQ (Fig. 2c). This signal, detected by an appropriate detection cascade 9, is output for shaper 3. Thus, shaper pulse, with an output level corresponding to a logical unit, is formed on the shaper 3, whose natural frequency is closest to the Doppler one (Fig. 2d ).

 At all inputs of the element 5I-NOT AND there appear logical units, and at its output - logical zero (FIG. A). This zero, applied to the control input of its key 2, opens it and ensures that the signal passes from the output of the bandpass filter 1 to the output of the blocking key 7 (Fig. 2e). This same zero, applied to the input of elements N AND-HE 4, creates a logical unit at its output. A logical unit from the code of the driver 3, which is inverted into a logical zero by the inverter 13, is fed to the input of the NK-HE 4 element, the output of which forms a logical unit. Logical units from the outputs of the element NAND-4 and (N + I) AND-NOT 5 are supplied to the second inputs of all the elements 2I-NOT 10, 12, respectively. Since the first inputs of the elements 2I-NOT 10, 12 already have a logical zero of the element 5I-HE 11, at its outputs, as in the initial state, logical units remain that do not affect the signal passing from the output of the bandpass filter 1 to the output of the blocking key 7.

At the same time, at the time of the occurrence of logical units, there are logical units at the outputs of the remaining 2I-NO 10, 12 elements at the outputs of the remaining 5I-NO 11 elements (except for one). The inputs of all elements 2I-NOT 10, 12, with the exception of one, are logical units, causing logical zeroes at their outputs, which, when applied to the fourth and fifth inputs of the corresponding elements 5IHE II, put logical units at their outputs.

Thus, during the passage to the output of the blocking key 7 of the signal from the output of the bandpass filter 1, which first exceeds the DO threshold, no other signal can pass.

If strobe pulses occur in two drivers 3 simultaneously, which is possible if the Doppler frequency corresponds to the intersection of the frequency characteristics of the bandpass filters 1, a logical zero opening the corresponding key 2 appears at the output of only one of the neighboring elements 5AND-HE 11 PC as the latter are included in their outputs and the second and third inputs in the trigger mode, and the lotus zero can remain at the output of only one of the concurrent elements 5I – HE11. At the moment of passing the useful component, the outputs of the corresponding polio filters 1 appear low-frequency responses caused by the action of the low-frequency component of the input signal (Fig. 2g, h). At the end of the transmission of the signal from the band-pass filter 1 (Fig. 2 d, e), a logical zero is returned at the output of element N AND-HE 4. At the same time, the responses form at the output of the corresponding formers 3 strobe pulses (Fig. 3 and, k), which, inverted by the corresponding inverters 1 into logical zeros and fed to the inputs of the (N + 1) AND -NE 5, support at its output a logical unit. Since now at the outputs of all elements 5I-NOT 11 there are logical units), the outputs of elements 2INE 10 are also units, as in the initial state, and at the outputs of all elements 2I-NOT 12 there are logical zeros that support logical units at the outputs of all elements 5I-NOT 11. Since in this case all the keys 2 are closed, the responses cannot pass to the output of the device. Upon completion of the longest response, the device returns to its original state. Regardless of the size of the processed frequency range, the proposed device only passes the useful component of the input signal. The blocking keys 7 are controlled by signals from the outputs of elements 2I-NOT 12, i.e., at the time the signal from the band-pass filter 1 passes to the output of all elements 2I-NOT 12 (except one), logical zeros are set, which open the blocking keys 7 (except one). The corresponding bandpass filters 1 are shorted to the body, which leads to the disappearance or, at least, to a significant decrease in the level, and hence the length, of the responses (Fig. 3e). In the proposed device, the point of processing (HOCTj) is increased. For rmula. 1. A device for processing signals of a speed-measuring meter, containing N 0 channels, each of which contains a serially connected band-pass filter and a key, while the band-pass filters enter and the key outputs of all channels are interconnected and are respectively the input and output of the device, and The second output of the bandpass filter of each channel is connected to the gate generator input, characterized in that, in order to improve the accuracy and simplicity of the device, the elements of N AND-NE, (N + I) AND-NOT and controlled are introduced the inverter, and in each of the channels, two elements 2И-НЕ, element 5И-НЕ, an inverter and a blocking key are entered, while the code of the gate generator of each channel is connected through the element 5И-11Е to the second input of the key, the first inputs of the elements 2И-NOT their channel and with the second and third inputs of the elements 5I-NOT, respectively, of the previous and subsequent channels and with the inputs of the element N AND-NOT, the second inputs of the elements 2I-NOT of each of the channels are interconnected and connected respectively to the outputs of the element (N + 1) AND- NOT and the element N AND-NOT, the outputs of the elements 2I-NOT each of the channels are connected respectively to the fourth and fifth inputs of the 5I-NOT element of its own channel, the second output of the bandpass filter of each channel is connected to the first input of the blocking key, the second input of which is connected to the output of the second element 2I-NOT of its channel, the output of the gate generator of each of the the channels through the inverter are connected to the corresponding input of the element (N + 1) AND-NOT, the output of the element N AND-NOT is through the controlled inverter is connected to the corresponding input of the element (N + 1) AND-NOT, and the outputs are blocked 1x keys connected to each other and by Connected to the device case. 2. The device according to claim 1, characterized in that the gate driver is designed as a series-connected amplitude selector and a detecting cascade, while the input of the amplitude selector is the input of the gate former, and the output of the detecting cascade is its output Sources of information received during attention during examination 1. USSR author's certificate in application N 2483055/09, cl. G 01 S 9/44, 06.05.77 (prototype).

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