JPS56153839A - Pla logical operation circuit - Google Patents
Pla logical operation circuitInfo
- Publication number
- JPS56153839A JPS56153839A JP5738680A JP5738680A JPS56153839A JP S56153839 A JPS56153839 A JP S56153839A JP 5738680 A JP5738680 A JP 5738680A JP 5738680 A JP5738680 A JP 5738680A JP S56153839 A JPS56153839 A JP S56153839A
- Authority
- JP
- Japan
- Prior art keywords
- circuit
- pla
- gates
- given
- output
- Prior art date
- Legal status (The legal status is an assumption and is not a legal conclusion. Google has not performed a legal analysis and makes no representation as to the accuracy of the status listed.)
- Pending
Links
Classifications
-
- H—ELECTRICITY
- H03—ELECTRONIC CIRCUITRY
- H03K—PULSE TECHNIQUE
- H03K19/00—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits
- H03K19/02—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components
- H03K19/173—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components
- H03K19/177—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form
- H03K19/17704—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns
- H03K19/17708—Logic circuits, i.e. having at least two inputs acting on one output; Inverting circuits using specified components using elementary logic circuits as components arranged in matrix form the logic functions being realised by the interconnection of rows and columns using an AND matrix followed by an OR matrix, i.e. programmable logic arrays
Landscapes
- Physics & Mathematics (AREA)
- Mathematical Physics (AREA)
- Engineering & Computer Science (AREA)
- Computer Hardware Design (AREA)
- Computing Systems (AREA)
- General Engineering & Computer Science (AREA)
- Logic Circuits (AREA)
Abstract
PURPOSE:To operate plural programmable logic array PLA circuits with a small number of input and output pins, by providing plural PLA circuits and a selecting circuit which connects plural input and output lines by the selecting signal from the external. CONSTITUTION:When the state of selecting signal S1 is 1, AND gates 7 and 9 are opened, and input signals I1-I3 are given to PLA circuit 2, and a signal corresponding to these input signals is outputted from circuit 2 through AND gate 9. At this time, the 0 level obtained by inverting signal S1 by inverter 3 is given to AND gates 6 and 8, and these gates are closed, and signals I1-I3 are not given to PLA circuit 1. When S1 becomes 0, gates 6 and 8 are opened, and an output corresponding to input signals I1-I3 is obtained from circuit 1, and the output is not outputted from circuit 2.
Priority Applications (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5738680A JPS56153839A (en) | 1980-04-30 | 1980-04-30 | Pla logical operation circuit |
Applications Claiming Priority (1)
Application Number | Priority Date | Filing Date | Title |
---|---|---|---|
JP5738680A JPS56153839A (en) | 1980-04-30 | 1980-04-30 | Pla logical operation circuit |
Publications (1)
Publication Number | Publication Date |
---|---|
JPS56153839A true JPS56153839A (en) | 1981-11-28 |
Family
ID=13054164
Family Applications (1)
Application Number | Title | Priority Date | Filing Date |
---|---|---|---|
JP5738680A Pending JPS56153839A (en) | 1980-04-30 | 1980-04-30 | Pla logical operation circuit |
Country Status (1)
Country | Link |
---|---|
JP (1) | JPS56153839A (en) |
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58109936A (en) * | 1981-12-17 | 1983-06-30 | ウェスターン エレクトリック カムパニー,インコーポレーテッド | Stored program controlled type machine |
JPH01138815A (en) * | 1987-11-26 | 1989-05-31 | Konica Corp | Signal processing unit |
JPH01501671A (en) * | 1986-11-07 | 1989-06-08 | コンカーレント・ロジック・インコーポレーテッド | Programmable logic cells and arrays |
JPH08256053A (en) * | 1985-12-06 | 1996-10-01 | Advanced Micro Devices Inc | Programable logic array device |
-
1980
- 1980-04-30 JP JP5738680A patent/JPS56153839A/en active Pending
Cited By (4)
Publication number | Priority date | Publication date | Assignee | Title |
---|---|---|---|---|
JPS58109936A (en) * | 1981-12-17 | 1983-06-30 | ウェスターン エレクトリック カムパニー,インコーポレーテッド | Stored program controlled type machine |
JPH08256053A (en) * | 1985-12-06 | 1996-10-01 | Advanced Micro Devices Inc | Programable logic array device |
JPH01501671A (en) * | 1986-11-07 | 1989-06-08 | コンカーレント・ロジック・インコーポレーテッド | Programmable logic cells and arrays |
JPH01138815A (en) * | 1987-11-26 | 1989-05-31 | Konica Corp | Signal processing unit |
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