SU655072A1 - Selector of pulses by recurrence frequency - Google Patents

Description

one

The invention relates to a pulse technique and can be used to automatically control the period or frequency of pulse sequences, for separating pulses with different tracking frequency.

A pulse selector with respect to the following frequency is known, the contents of the one-shot and the logic element are NOT, whose inputs are connected to the input of the selector, two output two-input logic elements AND-NOT, the INPUTS of which are connected to the output of the logic element NOT.

The disadvantage of this selector is the change in the duration of the output pulses and the dependence of the delay of the output pulses on the duration of the input pulses 1.

The closest technical solution to the invention is a pulse selector with respect to the following frequency, containing a waiting multivibrator, two key circuits and a delay element. The input pulse sequence is fed here to the first INPUTS of the key circuits, the second inputs of which are connected respectively to the direct and inverse outputs of the waiting multivibrator, the INPUT of which is connected to the input terminal of the selector via the delay element 2.

The disadvantage of this selector is low reliability due to failures that occur at the border between the areas of transparency and delay (simultaneous appearance of pulses at the outputs of the selector).

The aim of the invention is to increase reliability.

The goal is achieved by the fact that an inverter, an AND-NOT element and a trigger, the first input of which is connected to the output of the NAND element, are entered into the pulse selector by the following frequency, containing the first and second keys, the control inputs of which are combined, and the waiting multivibrator. the second INPUT - with the OUTPUT of the waiting multivibrator and with the first input of the element NAND, the first OUTPUT - with the input of the first key, and the second output - with the input of the second key. The control inputs of the first and second keys are connected to the output of the inverter, the input of which is connected to the INPUT of the waiting multivibrator, the second INPUT of the NAND element and the input of the device.

The drawing shows a circuit diagram of the pulse selector in terms of the following frequency.

The pulse selector for the following frequency contains a waiting multivibrator 1,

the logical element AND-NOT 2, the inverter 3, the trigger 4, performed on the logical elements AND-NOT 5, 6, the first key 7 and the second key 8 (the keys are executed on the logical elements AND-NOT). Position 9 denotes the input of the device, positions 10, 11 denote outputs.

The first input of the trigger 4 is connected to the output of the element AND-NOT 2, the second input - with the output of the waiting multivibrator 1 and the first input of the element AND-NOT 2, the first output - with the input of the first key 7, and the second output - with the input of the second key 8 The control inputs of the keys 7, 8 are connected to the output of the inverter 3, the input of which is connected to the input of the waiting multivibrator 1, the second input of the AND-NOT element 2 and the input 9 of the device.

The pulse selector for the following frequency works as follows.

The input pulses of the zero level are fed to the input of the standby multivibrator 1, to the second input of the NAND 2 logic element and to the input of the inverter 3. The waiting multivibrator 1 on the leading edge of the input pulse generates a single-level pulse of a set duration regardless of the duration of the input pulse.

With a low start frequency, i.e., when the pulse width of a single level generated by the waiting multivibrator

1, less than the period of input pulses, standby multivibrator 1 generates a pulse signal at the output, the duty cycle of which is greater than one. The signal from the output of the standby multivibrator 1 is fed to the first input of the NAND gate

2, to the second input of which impulses are selected for the period. At the output of the NAND gate 2, zero-level pulses are generated, the leading edge of which is delayed by a time equal to the duration of the input pulses.

The signals from the outputs of the NAND gate 2 and the standby multivibrator 1 control the operation of the trigger 4. The trigger 4 is controlled by zero-level pulses. Under the action of pulses from the output of the logical element AND-NOT 2, the trigger 4 is transferred to one state. With the end of the pulse of a single level at the output of the standby multivibrator 1, the trigger 4 is transferred to the zero state by the signal of the zero level. Since the leading edge of the pulses from the output of the AND-NOT 2 logic element is delayed for the duration of the input pulses, the signal levels at the output of the trigger 4 change, i.e., the switching and permissive potentials for the keys 7, 8 occur only after the end of the input pulses, Thus, at a low start frequency, the inhibitory potential (zero level) at the input of the key 7 and the permitting potential (unit level) at the input of the key 8 remain until the end of the input pulse.

The signals from the outputs of the trigger 4 are sent to the signal inputs of keys 7, 8, the control inputs of which receive signals from the output of the inverter 3. Since the signal input of the key 7 at the time of the input pulse has an inhibitory potential, there are no pulses at its output (unit level wives). At the signal input of the key 8 at this moment there is a resolving potential (unit level), and the input pulses pass to the output 11.

If the trigger frequency is such that the pulse duration of the standby multivibrator 1 is almost equal to the period of the input signal, a pulse signal is generated at the output of the standby multivibrator 1,

the duty cycle of which is close to unity. As the input pulse frequency increases, the zero-pulse length from the output of multivibrator 1 decreases.

At the border of the transparency and delay regions, the duration of these pulses is close to zero. Since these pulses always appear before the input pulses and end with the moment of occurrence of the input pulses, the trigger 4 always assumes a well-defined state before the appearance of the input pulses, as a result of which the simultaneous appearance of the output pulses at the outputs 10,

eleven.

If the trigger frequency is such that the duration of the pulse of the anticipated multivibrator 1 exceeds the period of the input signal, then the output of the waiting multivibrator 1

a single signal level is set. At the output of the AND-NOT 2 logic element, in this case, an inverted input signal is generated, with which the trigger 4 is switched to one state.

At the signal input of the switch 7, the permitting potential (a single level) is set, at the signal input of the switch 8 - the inhibitory potential (zero level). At the output of key 7 in this case

pulses are formed, the duration and time position of which exactly correspond to the input pulses, while at the output of the key 8 there are no pulses (unit level).

The described pulse selector with respect to the following frequency compares the duration of each period of the input signal with the duration of the pulse generated by the waiting multivibrator 1. If the interval is

between adjacent input pulses exceeds the pulse width of a single level from the output of multivibrator 1, then the second of the pulses passes to output 11. When this interval is shorter than the pulse duration from the output of multivibrator 1, the second of the pulses passes to output 10. Thus, does the forward frequency exceed a given value or less than this value, the proposed selector determines during one period of the input signal.

The provision of the necessary threshold frequency of selection is carried out by appropriately selecting its pulse duration formed by the front-end multivibrator 1.

Due to the fact that the change of levels at the output of trigger 4 occurs only after the end of the input pulses, the proposed pulse selector without adjustment works in a wide range of input pulse durations: from the minimum value determined by the speed of the applied logic elements to the maximum value determined by the pulse duration of a single level generated by the waiting multivibrator 1. The change of resolution and of the inhibitory potentials at the signal inputs of the keys 7, 8 only at the end of the input pulse s increases the reliability of the device and allows using the NAND logic elements as output key circuits, which simplifies the design of the device and allows the entire device to be implemented on

digital logical elements AND-NOT, as well as loads the accuracy of the device at the boundary between the areas of transparency and attenuation.

Claims (2)

1. The USSR USSR certificate of authorship about 449441, cl. N OZK 5/18, 19.09.72. 2. USSR author's certificate number 452068, cl. N OZK 5/20, 01.04.75. -0W