SU622079A1 - Arrangement for information parallel shifting - Google Patents

Description

one

The invention relates to the field of computing and can be used in digital computers and devices of discrete automation.

Shift devices are known that are built on shift registers 1. Their disadvantage is an increase in time when shifting by n bits in proportion to n.

The closest technical solution to the invention is a device for parallel information shift, containing AND, OR elements grouped by bit and rus, and each bit of each Russ contains two AND elements and one OR element, whose inputs are connected to the outputs of the AND elements. of its bit, the first input of the first element AND the i-ro (, 2, ...) bit and the first input of the second element AND (a + 1) -th bit of the first rus are connected to the i-th information input of the device, the element output OR i-TO bit / -th (, 2, ...) rus is connected to the first input of the first element AND i-ro bit and the first input of the second element AND (t + 2J) -ro bit (/ +) of the Russian, the outputs of the elements OR of the last Rus are connected to the outputs of the device, the second inputs of the first elements AND

the second inputs of the second elements AND of each bit of the / -H of the wheel are connected respectively to the / -th inverse and / -th direct control inputs of the device 2. A disadvantage of the known device is that it is intended to shift only positive numbers. Do not shift the negative numbers to the right, represented in the reverse or additional code, in

the higher-order bits are written zeros. To execute the modified right shift of negative numbers in the additional or inverse code in the released high-order bits, it is necessary to write the value of the sign bit.

The aim of the invention is to extend the functionality of the device to parallelly shift information by providing modified negative numbers that are specified in the reverse or additional code.

The purpose of the invention is achieved by the fact that in a device for parallel information shift, in each / -th floor, the first inputs of the second elements AND bits, starting from the first through (2 - + 1) -th, are connected to the first input of the first element And the first discharge .

The block diagram of the proposed device for the parallel shift of information is shown in the drawing.

It contains elements AND 1-16, OR 17-24 of the first Rus, elements AND 25-40, OR 41-48 of the second Rus, elements AND 49-64, OR 65-72 of the third Rus, information inputs 73-80, outputs 81- 88, first inverse 89 and direct 90 control inputs, second inverse 91 and direct

92 control inputs, third inverse

93 and direct my 94 control inputs. The device for the parallel shift of information works as follows.

The input information from inputs 73-80, depending on the control signal on buses 89, 90, is transmitted to the outputs of the elements OR 17-24 without shifting or shifting to the right (downward drawing) by one bit, and during shift, the leading (sign) value the bit from the input 73 is also transmitted to the output of the element 17 to the released bit. The subsequent Russ of the elements work similarly, only the second floor is shifted by two bits, the third by four, and so on, and the sign bit value is rewritten in all free major bits . At outputs 81-88, a code is formed that is shifted relative to the input by the number of bits specified by the control signal code from inputs 89-94, with the leading leading bits equal to the significant bit.

The application of the proposed device allows, with a slight increase in the cost of equipment, to perform a modified shift of the numbers represented in the forward and reverse code, which greatly expands its functionality.

Claims (2)

Invention Formula A device for parallel shifting information containing the elements AND, OR, grouped by bit and rusam, with each bit of each rus containing two elements AND a single OR element, whose inputs are connected to the outputs of the AND elements of its discharge, the first the input of the first element AND of the rd (, 2, ...) bit to the first input of the second element AND (r + 1) -th bit of the first rus is connected to the i-th information input of the device, the output of the element OR the i-ro bit yes / th (, 2, ...) the rue is connected to the first input of the first element AND of the i-ro bit and the first input of the second element of the AND (r + 2) th bit (/ + 1) of the rus, the outputs of the elements OR of the last rus are connected to the device outputs, the second inputs of the first elements AND and the second inputs of the second elements AND of each bit of the / th wheel are connected respectively to the / -th inverse and / -My direct control inputs of the device, characterized in that, in order to extend the functionality of the device by providing a modified shift of negative numbers specified in the reverse or additional code, in each / -th floor the first inputs of the second elements AND bits, starting from the first to () -1) -th, are connected to the first input of the first element And the first time Yes. Information sources, taken into account during the examination 1. I. Bukreev and others. Microelectronic circuits of digital devices, M., “Soviet Radio, 1975. p. 139, fig. 4.10. 2. US Patent No. 3659274, cl. 340-172, 5, 1972. S3 90 eight} 82 93 V