SU615489A1 - Random signal discriminator - Google Patents

Description

The invention relates to the field of computing and can be used in the processing of a random signal.

A random discriminator of a random signal, containing triggers, elements AND, OR, switch G | .. However, such a discriminator has a fixed value of the differential corridor, which limits its functional capabilities.

The closest technical solution to this invention is a discriminator of a random signal containing a reversible counter, the output of which is connected to the first input of the first comparator via a digital to analog converter and to the first input of the adder, the second input of the source is connected to the output of the source yarn, and the output is to the first input of the second comparator, the second input that is combined with the second input of the first comparator and connected to the information input of the discriminator. However, this discriminator has an Parameter redundancy.

The aim of the invention is to simplify the discriminator.

To achieve this goal, the proposed discriminator contains the first, second and third elements AND, a clock generator and a block of elements AND whose output is the first output of the discriminator, the first input is connected to the output of the reversing counter, and the second input to the second output of the discriminator and to the output of the third element I, the direct input of which is connected to the output of the clock pulse generator and to the first inputs of the first and second elements I, the outputs of which are connected to the summed switch and the subtractive inputs reversibly a counter, and second inputs are combined with the inverted input of the third AND gate and connected to the outputs of the first and second comparators, respectively.

The drawing shows a block diagram of the proposed device.

The discriminator contains a reversible counter 1, the output of which is connected through the diffro-analogue converter 2 to the input of the adder 3, the other input of which is connected to the output of the voltage source 4. The inputs of Comparators 5 and 6 are connected to the outputs of the adder 3 and the digital-analog converter 2, and the outputs to the inputs of elements 7.8 and to the inverse inputs of element 9 AND, the other inputs of which are connected to the output of the clock generator 10, and the outputs to the reverse inputs counter 1 and block 11 elements And, the other input of which is connected to the output of the reversible counter 1.

The discriminator works as follows.

The K code stored in the reversible counter 1 is converted into the corresponding level 1G, the voltage using the digital-analog transforming 2. Then the voltage U c is fed to the voltage adder 3, where it is added to the DI voltage generated by the source (constant ) voltage 4. The value of A13. determines the width of the differential corridor of the static analyzer.

The voltages TJ and I 4 di are applied to the reference inputs of the comparators 5 and 6, respectively, and the signal being analyzed is fed to their signal inputs. 13 The comparator b forms a signal at the direct output.

, only if the voltage at the signal input is greater than the reference, and the comparator 5 generates a single signal at the direct output only if the voltage at the signal input is less than the reference,

Thus, when the input voltage

 ,,

element 9 triggers and passes clock pulses to block element 11. A counter state is read, indicating the sequence number K of the differential corridor in which the input signal is currently located. The number N) (pulses at the output of the element And 9 is proportional to the period of stay of the analyzed implementation in the differential corridor (U, 11 q 4 U II).

In the case when the voltage Cp and f D IT of the signal appears at the forward output of the comparator 6, thus the element 7 is opened. The clock pulses start to flow to the summing input of the reversing counter 1. The voltage at the output of the digital-analogue converter 2 is increases until the interval (TI c, U c + DHG) covers the value of V-jj At this ale. Tie 7 is closed, and Tube 9 opens and results are issued as described above. If a

the voltage to ° opens the element AND 8 and the clock pulses are fed to the readings of the input of the reversible counter 1, due to which the voltage at the output of the converter 2 again tracks the input signalC.-.

Kim way the circuit tracks u

VC

Claims (2)

1. Mirsky G.Ya. Instrumental determination of the characteristics of random processes, Energii, Moscow, 1972, p. 418, fig.86. . 2. In the same place, p.324, fig. 6-27.