SU412678A1 - - Google Patents

Description

I

This invention relates to digital electrical and computing technology.

A known analogue-to-digital active power converter contains an integrator, the output of which is connected through a comparator and a key to a pulse counter and a stable frequency pulse generator, a period BbiHBHTevTb, a reference voltage driver connected to one type of switching device, the output of IlOTOporo is connected to the integrator input, and control device. However, due to the significant errors in the multipliers of instantaneous values that are integrated. (summed) during integration, the accuracy of the converter is low. In addition, the accuracy of the conversion limits the error from the zero drift of the integrator amplifier, which is also integrated.

The proposed converter is distinguished by the fact that, in order to increase the accuracy of the conversion, a sum-difference circuit and a quadrant circuit are included in it, connected in series, with one input of the sum-difference circuit connected to the input of the analog-digital converter, and the other input through the control unit connected to the YET You are a period spell. The output of the quadrant is connected to the second input of the switching device, and the inputs of the reverse of the pulse counter are connected to the control inputs of the device.

In the drawing nz.o. block diagram of the proposed converter.

The circuit contains a sum-difference circuit -1, a quad 2, a period exponent 3, a switching device 4, an integrator 5, a reference voltage driver 6, a device 7, a electronic key 8, a generator of 9 stable frequency pulses, a reverse counter 10 pulses and a device 11 controls

In the first cycle, equal to or a short period of the input voltage, a voltage equal to the sum of the instantaneous values of the input voltages, t / j (i and (KJE), Ui { t)), a U2 (t) K2-i (t), where K and KZ are the proportionality coefficient, U- (i) and i (t) are the instantaneous values of the input voltage and current.

The output ratio of the quadrant 2 is instantaneous of the 1st values through switch 4 is fed to the integrator 5 during a time interval equal to the period of the input signal G, which is allocated by the discriminator 3 periods. The driver of the integrator at the end of the first clock cycle is equal to

T

and, K ,, ifbi (0 + t / j (OF dt,

ABOUT

where Kii is the constant integrator coefficient. :.

In the same cycle, a negative reference voltage UQ is formed, proportional to the period, i.e. Q. UQ K T, where / (o is constant on the voltage generator 6 onopiioro.

In the second cycle to the input of the integrator, voltage V, V ,,. At the same time, its output voltage drops linearly until the operation of the comparison device 5. When the operation voltage of the device was compared to zero, the equation of the second conversion cycle can be written as follows:

 V, (t) + U, (t) ,, I / CoH 0,

oo

from where

one

u, (t.) + u-2 (tmt. L g I

Lo For the time H.- (time of the second cycle) the key S is opened, which is opened by a pulse from the control unit // synchronized by the period generator 3, and closed by the output impulse of the comparator device.

At the same time, the number of pulses transmitted from the generator 9 of stable frequency pulses to the reversible counter 10, operating in the summation mode, is proportional to the time interval TX. The counter reversal is also performed by the control unit.

In the third cycle, the voltage from the output of the sum-difference circuit, which is now equal to the difference of the voltages Ui (t) and U2 (t), comes again through the quadrant. The output voltage of the integrator at the end of the period is equal to

U ,, (t) -U2 (. О

To determine this voltage, the voltage is again applied to the integrator input (/ o and at the time of output voltage crossing through zero, fixed by the device, compared, we have a time interval (duration of the fourth cycle):

, . t

T..2 J-L U, (t) (t) Ydt. "Yj j

At the time the key is open; and pulses from generator 9 are passed to a reversible counter, 76, which operates in this step of deduction. The difference in the number of pulses transmitted to the counter during the time intervals 7., li Ch.2 is equal to /

tI. .

  V, (t) and, (t) dt U (0 i (t) dt,

 oo

where Kill is the analog-to-digital conversion factor.

The number of impulses / V recorded in the counter at the end of the conversion is proportional to the active power.

Subject invention

An analog-to-digital active power converter containing an integrator, the output of which is connected through a comparator and a key to a pulse counter and a generator of stable frequency pulses, a period puller, an on-arc voltage driver connected to one input of a switching device, the output of which is connected to the integrator input , a control device, characterized in that, in order to increase the accuracy of the conversion, an sum-difference scheme and a quadrant are connected in series, one On the inlet of the sum-difference c. keme is connected to the inlet of the analogue-digital converter of active power, and another input is connected to the output of the period indicator, the output of the quadrator is connected to the second input of the switching device, and the inputs of the pulse counter reverse are connected to the outputs of the device unravleii.