SU1506382A1 - Digital phase meter - Google Patents

Abstract

This invention relates to the field of radio engineering. The aim of the invention is to increase the speed of the phase meter. The goal is achieved by introducing into the phase meter a voltage source 8, connected to the second inputs of analog-to-digital converters (ADC) 5 and 6, as well as directly connecting the outputs of the sinus and cosine phase detectors 3 and 4 with the corresponding inputs of the ADC 5 and 6. The phase meter also contains limiting amplifiers 1 and 2 and a persistent storage element 7. 2 Il.

Description

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Imaging The sweat relates to radio engineering and can be used to create phase-measuring devices. The aim of the invention is to increase the speed of the 5 Phase meter.

Figure 1 shows the structural diagram of the phase meter; in fig. 2 - digrams, polsuyi; no phase meter operation.

The digital phase meter contains two limiting amplifiers 1 and 2, sine and cosine phase detectors 3 and A, two analog-to-digital converters (ADC) 5 and 6, a permanent storage element (PZE) 7, and a source 8 of the forks-o voltages The outputs of limiting amplifiers and 2 are connected to the corresponding inputs of phase detectors 3 and 4, the output of which through AID 5 and 6 is connected to the inputs of the PZE 7. In addition, the output of the source 8 of the reference voltage is connected to the second input of both ADC 5 and 6.

The measurement of the phase difference is as follows.

The signals are amplified by an amplifier mimic switches 1 and 2, the phase difference (uqi) is converted by sine and cosine phase detectors 3 and 4 from which voltage, proportional to sin (cos) and cosu (|), is fed to the signal input of the corresponding ADC 5 and 6 and are compared with the reference voltage (,), which is supplied to the reference input of each ADC 5 and 6 from the output of the source 8 of the reference voltage. The logical signals from the LZC 5 and 6 outputs convert the FES 7 into a digital code, continuously and linearly change the phase difference of the input signals from -180 to +180 e. hail.

The introduction of a reference voltage source does not impair the measurement of the phase difference. The output voltage of the sinus phase detector has the form (Fig. 2a),

and,;, (tf), Where K is the transmission coefficient of the phase detector; And - the amplitude of the radio signal on

output amplifier limiter;

Bc | - measured phase difference. The output voltage of the cosine phase detector has a fork (Fig. 26)

Ucos (bqi) C LOB.

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 B; .1ho; one ADC code (phi1.2b) is formed as a result of calculating the ratio of the Znap from the IJc output detector; -, (itf) (cos H) of the reference voltage Upn, from the output of the source 8 of the reference tension

The PZZ 7 programmed the function for calculating the arctg ratio of the digital code from the output of the ADC 5 sine channel and the digital code from B1) 1kup of APP 6 of the cosine channel (Fig.2g) U5i "(Mf) ./ .A7 sint

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cos.p (- Thus, the introduction of a source of the reference voltage w does not impair the instrumental accuracy of measuring the difference fa 3.

It is known from experimental data that, in the range of input signals of +2.0 V, the speed of the module allocation unit, taking into account the arising. switching noise does not exceed 0.45 ISS, i.e. the actual duration of the input radio pulses must be at least 0.5 µs. At the same time, it is known that the period of the pulse following the sampling of the ADC can be 0.05 µs, i.e. It is possible to process radio pulses with a follow-up period of 0.1 µs and a duration of 0.08 µs.

Thus, the introduction of a voltage source into the digital-phase meter, instead of the module allocation unit, can significantly increase its speed and resolution.

Formula and 3 about b and e and i

A digital phase meter containing two amplifier-limiter, sine and cosine phase detectors, two analog-digital converters and a permanent storage element, the output of each amplifier-limiter connected to the corresponding inputs of the sinus and cosine phase detectors, and the outputs of analog-digital converters connected with inputs of a persistent storage element, characterized in that, in order to increase speed, a voltage reference source is additionally introduced, whose CRIPPING is connected to one by their inputs of both analog-to-digital converters,

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Claims (1)

Claims A digital phasometer comprising two limiter amplifiers, a sine and cosine phase detectors, two analog-to-digital converters and a read-only memory element, wherein the output of each limiter amplifier is connected to the corresponding inputs of the sine and cosine phase detectors, and the outputs of the analog-digital converters are connected to the inputs of the constant-digital converter a storage element, characterized in that, in order to improve performance, an additional reference voltage source is introduced, the output of which connected to one of the inputs of both analog-to-digital converters, and the outputs of the sine and cosine phase detectors are connected to other inputs of the corresponding analog-to-digital converters.