SU605327A1 - Pulse receiver synchronising arrangement - Google Patents

Description

one

The invention relates to communication technology and is used for synchronizing and phasing local generators of devices for optimal processing of complex phase-shift keyed signals.

A synchronization device for pulse receivers is known, containing input-signal accumulator connected in series, a normal block, first and second delay blocks, a first coincidence block, a third delay block and a dynamic memory block, to the forward inputs of which the output of the first delay block is connected through a differentiating block and outputs - to the corresponding inputs of the second block of coincidence, as well as the reference frequency generator and the first and second keys combined by the control input, the output of the first key being connected n to the control input of the frequency divider, the output of which is connected to the input of the output pulse shaper

one.

However, in this device, phasing errors significantly affect the registration errors of the received information.

The purpose of the invention is to reduce the fluctuation of the output pulses.

To do this, into the synchronization device of the pulse receivers containing the input signal accumulator connected in series, the threshold block, the first and second delay blocks, the first match block, the third delay block and the dynamic memory block, connect the output of the first delay block through the differentiating block to the push inputs, and the outputs to the corresponding inputs of the second coincidence unit, as well as the reference frequency generator and the first and second keys combined by the control input, the output of the first key being connected A front-side driver has been entered to the control input of the frequency divider, the output of which is connected to the input of the output pulse generator,

gate driver p connected in series an additional delay unit, two half gates driver, error discriminator, integrator and control unit, with the output of the frequency divider connected

to the input of the additional delay unit and through the gate driver to the control input of the first key, to the information input of which the output of the second block is connected through the front driver

of the front edges, the output of the threshold unit is connected via a second key to another input of the error discriminator, and the output of the reference frequency generator is connected to the control input of the control unit whose output is connected to the first input of the frequency divider.

On the ce line, a structural electrical circuit of the proposed device is shown.

The synchronization device of the immersion receivers contains the input signals in series 1, the threshold unit 2, the first 3 and second 4 delay blocks, the first coincidence block 5, the third 6 delay block and the dynamic memory block 7, to the forward inputs of which the output of the first delay block 3 is connected through the differentiating unit 8, and the outputs to the corresponding inputs of the second block 9 coincidence, as well as the generator 10 of the reference frequency and the first and second 12 keys combined by the control input, the output of the first key being connected To control input of the frequency divider 13, the output of which is connected to the input of the shaper 14 output pulses, as well as the front-side shaper 15, the strobe shaper 16 and the additional delay block 17 connected in series, the two half-shaper 18, the discriminator 19 error, the integrator 20 and the block 21, wherein the output of the frequency divider 13 is connected to the input of the additional delay block 17 and through the gate driver 16 to the control input of the first key 11, to the information input of which the output is connected the second block 9 matches through the front edge shaper 15, the output of the threshold unit 2 via the second key 12 is connected to another input of the discriminator 19 error, and the output of the frequency generator 10 is connected to the control input of the control unit 21, the output of which is connected to the first input of the frequency divider 13 .

The device works as follows.

The inputs of the adder 1 receives the envelopes of the input signals having the shape of a triangular pulse. If there is a session at the output of adder 1, regardless of the transmitted information, a periodic sequence of pulses appears with a period T equal to the manipulation period, since each of the transmitted signals Si (t), Sz (t), ... Sm (i) causes the appearance of a “compressed pulse at the corresponding input of the adder 1. From the output of the adder 1, the pulses arrive at the input of the threshold unit

2 (for example, the Schmitt trigger), the temporary location of the leading and trailing edges of the signals of which carries information about the phase of the input signal. The pulses from the output of the threshold unit 2 arrive at the first 3 and second 4 delay blocks, with a delay time equal to the manipulation period 7. The impulse at the output of block 5 coincidence appears in the case when the input of the block

3 delays receive two pulses separated by a time interval T. The pulses from the output of block 5 match through the third block 6 of the delay arrive in block 7 of the dynamic memory. The delay time of the third delay block 6 is significantly less than the manipulation period T. For the dynamic memory unit 7, the pulses obtained by differentiating the leading edges of the output pulses of the first delay unit 3 are promoting. An impulse at the output of the second block 9 coincides with the filling of all the bits of the dynamic memory block 7, which occurs only when the output of the threshold block 2 is at least

than ra-f 1 the following pulse pulses with a time interval T. The pulse from the output of the second block 9 coincidence is fed to the input of the racer 15. The selected front of the signal of the block 9 coincidence is at time points,

not coinciding with the moments of arrival of the negative strobe from the output of the driver 16, through the key 11 enters the input of the divider 13 and records in it the number

„, Fan strobe. .

where / By is the division factor of divider 13, equal to the ratio of the period T of the manipulation of the complex phase-manipulated signal to

period - the signal generator 10;

/ op

Tstrob. - the duration of the gating pulse shaper 16.

The signal at divider 13 output appears

/:

t t

op Chrobrob / Loperiodov frequency gene 2

Ratio 10. This signal includes shapers 14 and 16. Since the duration of the gate is Tstrob. shaper 16 selectable

equal to twice the value of the maximum fluctuations of the leading edge of the signal of block 9, the next clock period does not record the number in divider 13 by the pulse from the output of shaper 15,

since the key 11 under the influence of the negative strobe does not transmit the pulse of the driver 15 to the input of the divider 13. The output pulse of the divider 13 through the additional delay block 17 turns on the driver 18. The duration of the additional delay block 17 is equal to half the maximum fluctuations of the leading edge of the coincidence block 9. The duration of each of the half grouser 18

equal to half the sum of the duration of the input signal and the maximum value of the signal fluctuations. Two half-lines arrive at the discriminator 19. The signal from the output of the discriminator 19 through the integrator 20 and the control unit 21 in accordance with the averaged error produces the addition or exclusion of generator pulses 10 in the divider 13, thereby shifting the phase of the output pulses of the driver 14.

The proposed device allows to reduce fluctuations of the output pulses.

Claims (1)

Invention Formula A synchronization device for pulse receivers containing a series-connected adder of input signals, a threshold block, first and second delay blocks, a first match block, a third delay block and a dynamic memory block, to the forward inputs of which the output of the first delay block is connected through a differentiation block and outputs to the corresponding inputs of the second coincidence unit, as well as the reference frequency generator and the first and second keys combined by the control input, the output of the first key being connected to the control yuschemu input of the frequency divider, whose output is connected to the input of the output pulses, characterized in that, to reduce the fluctuation of output pulses, it introduced shaper leading edges, strobe generator and additional series connected delay block generator two half-gates, an error discriminator, an integrator and a control unit; the output of the frequency divider is connected to the input of an additional delay unit and through the gate driver to the control input of the first key, to the information input of which the output of the second block is connected through the front-side driver, the output of the threshold block through the second key is connected to another input of the error discriminator, and the output of the reference frequency generator is connected to the control input of the control unit, the output of which is connected to the first mu input frequency divider. Sources of information taken into account in the examination 1. Authorship of the USSR No. 342301, cl. H 04B 1/66, 1972.