SU571787A1 - Single-duration time interval meter - Google Patents

Description

The inventions RELATED to the region of the measurement of the gel technique "to be based on & tiaoa. when measuring one-time intervals.

Testers gauge ;, time bandwidth interlock with Hungarian h-pulse generator, treigter and counter G ..

- .. J

IzEvsgei HsvriepiiTeKb about nokratstsyk nyk. One of the P-jKj account registers, triggers at the first entrance of the first card are sent to the second stop, and the second stop is sent to the CDS, the first VAZD of which is connected to the second stop. with sbixoADM Ganeragora schetnyk m-lpupsov, partitioned delay line, the outputs of which, ka5EF, first through its temporary se -lektsr} podk.yochepy to their first inputs TpKrrepoBs outputs kogoryhz WSS turn, g podklochent nasbotvvtstyuyushie inputs perncJV ra yield .s associated. junior rar dami counts a 2. The disadvantage of such a meter is the presence of an error of its own with non-contact information of a customer.

pulse of 01 to the screw to the counts of the counting of the energy cycle

The purpose of the invention is to increase the cost of yamerenk. To do this, in a ervtvl introduced

i-j control unit shaper short

the impulse S3 flonoriHHTSnbiibsli is a valve whose output is connected to the entrance of the first account of the first BentiPyag and the second entrance to the Bykhodo. young

g check bit ON the counter with the first input of the control unit connected to the first input of the first trigger, and the first input to the second, the third input to the first input, and the fourth to the output of the first valve, paras

S YOU BbiKot. the control unit is connected to the input of the partitioned delay line through the short importer; the second to the combined second inputs of the variable selector; the third to the integrated second.

J input of all triggers except the first, and the fourth, to the input of the register manager.

 The drawing shows a measurement diagram.

: The output of the generator of black impulse kwaiyuyu sequence of 1 is connected to the first input of the valve k. A second trigger Sj of the Zupus input and reset of which is connected to the second inputs of the unit is connected to the second input of the CS; the control 4 4 two other inputs are connected to the input and output of the valve 2, and the corresponding outputs of the control unit 4 1 are one to the first input of the former korogkkkk. impulses 5 and cherbz him to the synchronized delay delay 6, the second “to the first impulse”. The variable selectors 7–13s of the tertiary are connected to the reset inputs of the flip-flops and fourths to the control input of the register 25. The output of the imaging unit 5 is connected to the input of the delay line 6, the outputs of which are connected to the first inputs of the selectors whose slots are connected to the trigger inputs S - S Triggers that are connected to other inputs of ragkstra 25, the output of which is connected to the low-voltage input of the pulse counter 26s, the AC output of which is connected to one input of the valve 27, the other input is connected to the output of the valve, 2, and the output of the valve 27 is connected to the entrance of senior their bits of the HTvinynbcOB counter 26. The signal of the start of the conversion of the start impulse is fed to the trigger start input 3 and the control unit input, according to this trigger 3, giving the signal to the pulse 2j allowing the pulses to pass from generator 1 to the older ones The discharge pulse pulse is 26, and the control unit is 4 you. the signal to form 5 from the output of which the generated pulse through the water of the delay line 6 arrives at one input of time selekgors 7--15j to the other inputs of which comes the prohibition signal generated by the control unit 4. as soon as the output of the valve 2 is activated, the first impulse The pulse of the inhibit chooses with% ff. Thus, the Grigger RS will record the phase mismatch of the signal of the start of the conversion (start-pulse) n of the quantizing generator pulses with accuracy discrete delay line. The line-of-decoding discrete is equal to mgkp ® by using ten counters; pulses are required up to. pestello deciphering the result of shmu. The information on the phase mismatch of the signal of the beginning of the conversion (cTapi-ti pulse) and the pulses of the generator of the quantized sequence recorded by 35-S triggers (16-24), the signal formed by block 4, converts the register 25 from the parallel code to the follower and is rewritten to the low-order bit of the pulse counter 2Q, and the RS of the trigger 16-24 after the time required for dat1 data rewriting is established by a signal generated by the control unit. bottom 4e to the initial state. The conversion end signal (stop im.) NccTjmaeT to the reset input of trigger 3 and the input of control unit 4. Accordingly, trigger 3 gives a signal to Hung gj that prohibits the passage of pulses from generator 1 to higher bits of the CYI control signal 26j and the control unit extracts from the pulse sequence the first pulse following the con- signal. the conversion (stop pulse), which is fed to the shaper of short nmguls 5. From the last pulse, the emitted impulse through the taps: short-handedly leftover delays 6 goes to one tggsody of time selectors T-lSj at the same time, -three comes., a prohibition signal, which is formed by the control unit 4 according to the signal "ity-f delayed relative to the signal of the end of the transition (stop pulse) at a time. Thus, the trigger will fix the phase mismatch of the signal of the end of the conversion (c-top pulse) and the pulses of the generator of quantized loads of sequential 1 with the accuracy of the pin pitch. in the low-order pulse counters 26, since it is possible to discontinue the younger resolution of the spacing of the emulsions 26 in the case when the conversion error due to a mismatch between the phases of the signals at the end of the conversion and the impulse By combining the younger bit of the counter to the older ones, it is possible to carry out the transfer unit. Mula of the invention. A single-time interval meter containing a counter, a trigger register, at the first input of the first of which is a sub-pulse with a gart pulse, and at the second stop-pulses a counting pulse generator, the first input of which is combined with the output of the first rpHrrepas and the second - with yyu. G-enterator of the counting to: pulsov.sektsyon fOzaniu7o linsho delay, the inputs of which, through its temporary selector, are connected to the rsep-VYM inputs of their triggers,) which, in turn, are connected to the corresponding register inputs, output sv zangug-o s

the younger bits of the counter, so that, without aiming at increasing the accuracy of the measurement, a control unit, a short pulse shaper and an additional gate are inserted, which is connected to the input of the senior digit® of the counter, the first The input "with the output of the first valve, and the second input with the output of the lowest times of the counter, where the first input of the control is connected to the first input of the first trigger, and the second to the second, the third input is connected to the first axon, and the fourth s output first, the first output of the control unit formvrovatel of short pulse included in

the input of the partitioned delay line, the second to the combined second time-selector inputs, the third to the combined second inputs of all the trigger except the first, and the fourth to the register control input.

Sources of evidence taken into consideration for the examination:

1. Снт с 3, I. Information producers for electronic digital computing devices. M. / Zergv 1870,

p. 208

2. Shl Vdin V M, Digital measuring transducers and devices ,, M., V. Sh., 1973, p. 170, fig. .